SOC Verification Engineer- SOC DDR, UMC
Confirmed on the employer's own hiring board on Oct 22, 2026. First seen by Alion on Oct 16, 2026. AMD scores B on the Alion truth index.
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THE ROLE (SOC Verification Engineer: SOC DDR, UMC):
- Work on SOC level verification activities, the person will be responsible for bringup verification of LPDDR5, UMC at SOC. Work with testbench team to bringup required infra Structure to bring up testbench and simulation.
- He will be responsible to coordinate with Design team for RTL delivery, work with design (IP, Subsystem, SOC) for RTL and TB collaterals and resolve issues.
- He should have good understanding of LPDDR5, UMC.
- He will be responsible to create TB collaterals for LPDDR5, UMC and phy bringup.
THE PERSON:
- Engineer with strong self-driving ability.
- Need excellent communication skills (both written and oral)
- Strong problem-solving skills, go to person for SOC testbench, DDR verification, C/C++ Coding, UVM coding, Testcase coding, checkers and assertions.
KEY RESPONSIBILITIES:
- DDR Simulation bringup (Has responsibility of TB, Testcase, coordination between design and dv team)
- Memory verification is key responsibility.
- Work with Memory architects to resolve issues seen in simulation.
PREFERRED EXPERIENCE:
- Good understanding of LPDDR*, UMC, Nandflash, Nor Flash etc…
- Expertise in IP, Subsystem and SOC Verification with specialization in NLP Simulation.
- Strong hands-on experience in different SOC Verification activities, DDR Simulation, UVM, System Verilog, X86, C++, HW/SW co-verification, Scripting (phython) Test plan review, Debug/triage, Coverage, Strong Problem Solving, Automation and Debugging Skills, System bus protocol understanding including some of the common IPs like ACE, CHI, AXI, PCIe, DDR, memory controller etc.
- Comfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, UPF/CPF flows etc.
- Strong understanding of System integration, Make file flow, Verification Methodologies, Boot up sequence.
- JIRA based project management is a plus.
ACADEMIC CREDENTIALS:
- BE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE
- 8-12 years of strong DV experience in CLK, RST verification, NLP simulation, IP, Sub System & SOC Verification.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE (SOC Verification Engineer: SOC DDR, UMC):
- Work on SOC level verification activities, the person will be responsible for bringup verification of LPDDR5, UMC at SOC. Work with testbench team to bringup required infra Structure to bring up testbench and simulation.
- He will be responsible to coordinate with Design team for RTL delivery, work with design (IP, Subsystem, SOC) for RTL and TB collaterals and resolve issues.
- He should have good understanding of LPDDR5, UMC.
- He will be responsible to create TB collaterals for LPDDR5, UMC and phy bringup.
THE PERSON:
- Engineer with strong self-driving ability.
- Need excellent communication skills (both written and oral)
- Strong problem-solving skills, go to person for SOC testbench, DDR verification, C/C++ Coding, UVM coding, Testcase coding, checkers and assertions.
KEY RESPONSIBILITIES:
- DDR Simulation bringup (Has responsibility of TB, Testcase, coordination between design and dv team)
- Memory verification is key responsibility.
- Work with Memory architects to resolve issues seen in simulation.
PREFERRED EXPERIENCE:
- Good understanding of LPDDR*, UMC, Nandflash, Nor Flash etc…
- Expertise in IP, Subsystem and SOC Verification with specialization in NLP Simulation.
- Strong hands-on experience in different SOC Verification activities, DDR Simulation, UVM, System Verilog, X86, C++, HW/SW co-verification, Scripting (phython) Test plan review, Debug/triage, Coverage, Strong Problem Solving, Automation and Debugging Skills, System bus protocol understanding including some of the common IPs like ACE, CHI, AXI, PCIe, DDR, memory controller etc.
- Comfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, UPF/CPF flows etc.
- Strong understanding of System integration, Make file flow, Verification Methodologies, Boot up sequence.
- JIRA based project management is a plus.
ACADEMIC CREDENTIALS:
- BE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE
- 8-12 years of strong DV experience in CLK, RST verification, NLP simulation, IP, Sub System & SOC Verification.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.