CPU Implementation Feasibility Engineer
Confirmed on the employer's own hiring board on Nov 6, 2026. First seen by Alion on Aug 11, 2026. Apple scores A on the Alion truth index.
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring your passion and dedication, and there's no telling what you could accomplish. Here, dynamic people and innovative technologies are the norm - the engineers on our teams have reinvented entire industries through Apple hardware. That same drive for innovation extends to how we work, and to our commitment to leave the world better than we found it.
Apple's Silicon Engineering Group (SEG) is looking for talented engineers to join our CPU implementation feasibility team. You'll help shape the next generation of Apple silicon from the earliest stages, working with RTL on turning ambitious microarchitectural ideas into buildable, high-performance, low-power designs.
Description
As a CPU Implementation Feasibility Engineer you will be working extensively with micro architects to help define the CPU and memory subsystem and performing feasibility experiments. Responsibilities also include but are not limited to:
-Performing different feasibility experiments for RTL innovations and improvements that drive the next generation high performance and low power chips
-Making area, frequency, performance and power trade-offs
-Driving RTL-to-GDS flow through synthesis/place-and-route with ambitious goals for power, performance, and area
-Working with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, power, testability, and reliability
-Performing different floor planning experiments to understand the microarchitectural feasibility for achieving high targets for performance, power and area
Minimum Qualifications
BS and 10+ years of relevant industry experience
Experience with VLSI implementation on high performance designs
Preferred Qualifications
Deep knowledge of CPU microarchitecture
Experience with critical path closure techniques
Understanding of static timing analysis and power
Physical Design Fundamentals
Implementation experience on high performance CPU designs
Understanding of low power microarchitecture and implementation techniques for CPUs
Experience with Logical Equivalence checking (LEC) tools
Experience with Power analysis tools
Experience with Static Timing Analysis Tools
Deep understanding of power, performance and area tradeoffs
Strong communication and ability to influence architectural decisions with data