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Location
In office (Austin)
Seniority
Middle · 3+ years exp
Visa
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Confirmed on the employer's own hiring board on Nov 3, 2026. First seen by Alion on Nov 2, 2026. Apple scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Apple is an American multinational technology company founded in 1976 by Steve Jobs, Steve Wozniak and Ronald Wayne, and headquartered in Cupertino, California. It designs and sells consumer hardware including the iPhone, Mac, iPad, Apple Watch, AirPods and Vision Pro, together with the operating systems and silicon that run them. A growing services division built around the App Store, iCloud, Apple Music, Apple TV+ and Apple Pay now contributes a large share of profit, making Apple one of the most valuable companies in the world.

As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they’ve never before envisioned. In this highly visible role, you will be responsible for SOC power optimization automation, power modeling, and simulation.

Description

The main responsibility of this role is to drive the automation for SOC power optimization.

- Working with SOC power team members to automate the power analysis and optimization tasks

- Explore new methodology to analyze the power data, create power metrics to identify the optimization opportunities, drive automated approach to improve SOC power efficiency across IPs

- Explore machine learning approaches to optimize SOC power, work with team members on training data preparation, research ML based solution for power simulation, optimization and modeling.

- Collaborate cross-functional teams to deploy the power optimization automation to improve SOC power, review results, improve the methodology on efficiency, runtime, and support boarder scope of designs.

Minimum Qualifications

BS and a minimum of 3 years of relevant industry experience.

Preferred Qualifications

MSEE preferred

Familiarity with machine learning algorithms and programming

Familiarity with scripting in Python.

Familiarity with ASIC power analysis and optimization

Familiarity with SOC design flow and methodology

Familiarity with Verilog and System Verilog.

Familiarity computer architecture, logic and circuits design

Familiarity signal processing is a plus

Silicon power measurement experience is a plus

SOC power modeling, low power design and power optimization experience is a plus

Strong communication skills are a pre-requisite as the candidate will interface with a lot of different groups

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