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Salary
≈ $122k – $275k per year (Estimated)
Location
In office (Cary)
Visa
H-1B filings in 12 months: 368 · for this role: 117 · green card filings: 176
Employment
Full-Time

Confirmed on the employer's own hiring board on Nov 1, 2026. First seen by Alion on Oct 15, 2026. Cadence Design Systems scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Cadence Design Systems is an American software company founded in 1988 that supplies the electronic design automation tools engineers use to design and verify integrated circuits. Its products cover digital synthesis and place-and-route, custom and analogue design, circuit simulation with the Spectre and Virtuoso families, functional verification, and increasingly system-level analysis for packaging, thermal behaviour and computational fluid dynamics. Headquartered in San Jose and listed on Nasdaq, it also licenses design intellectual property such as processor and interface blocks, and competes primarily with Synopsys and Siemens EDA.
Backed by Sequoia Capital

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Join our team of layout designers creating challenging IP designs for the consumer, industrial, and automotive markets. Our designs are fabricated in the world’s leading edge silicon processes for companies ranging from large multinational companies to hot start-ups. Learn on-the-job how to apply your engineering background to create these robust high performance analog designs. Working with experienced skilled designers, you will be part of the design team using Cadence design tools. We are looking for a layout engineer capable of producing quality layouts of analog/mixed-signal circuit blocks, working in collaboration with circuit designers. Responsibilities include all facets of the back-end flow, from initial floor planning through detailed layout and final verification of conformance to foundry design rules.

The Cadence IP Group custom layout team develops and delivers a variety of high-quality high speed and high accuracy CMOS integrated circuits IP for several foundries and process nodes down to 5n and even below. We are deeply involved in finfet layout and even beyond (gate all-around).

As part of Cadence, the Cadence IP group custom layout team not only has access to all the current and future Cadence layout and verification tools, we also participate in the development and validation of the Cadence Virtuoso software, which the most used in the industry.

As a custom layout designer, you will be involved in:

  • Implementing high speed and high accuracy cells, blocks and IP blocks in a timely fashion with high quality and efficiency
  • Working with custom layout designers from groups all over the world to build high quality IP and test-chips
  • Working with circuit designers from groups all over the world to understand their technical and schedule needs
  • Collaborating with the Cadence R&D teams (Virtuoso, PVS developers) to help develop the layout editing and verification tools
  • BSEE, MSEE
  • Exposure to microelectronics design and requirements
  • Understanding of layout effects on the circuit such as speed, capacitance, power and area etc.,
  • Knowledge of various analog layout techniques like matching, shielding etc.,
  • Exposure to Cadence Virtuoso Layout and physical verification tools
  • Team player, driven, self-motivated and autonomous
  • Excellent communication, presentation and customer service skills

We’re doing work that matters. Help us solve what others can’t.

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