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Salary
$154k – $286k per year
Location
In office (Cary)
Seniority
Principal · 7+ years exp
Visa
H-1B filings in 12 months: 368 · for this role: 117 · green card filings: 176
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 28, 2026. First seen by Alion on Oct 7, 2026. Cadence Design Systems scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Cadence Design Systems is an American software company founded in 1988 that supplies the electronic design automation tools engineers use to design and verify integrated circuits. Its products cover digital synthesis and place-and-route, custom and analogue design, circuit simulation with the Spectre and Virtuoso families, functional verification, and increasingly system-level analysis for packaging, thermal behaviour and computational fluid dynamics. Headquartered in San Jose and listed on Nasdaq, it also licenses design intellectual property such as processor and interface blocks, and competes primarily with Synopsys and Siemens EDA.
Backed by Sequoia Capital

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This is an opportunity to join a dynamic team of experienced engineers developing physical IP for industry-standard high-speed serial-links.

The successful candidate will ideally be a highly-motivated self-starter who can work independently to complete assigned tasks and contribute to project leadership. The candidate will contribute to all mixed-signal design, verification, and testing aspects. This includes circuit design and development from a high-level architectural specification, post-silicon test plan development and execution, and collaboration with the digital team to achieve functional and performance closure.

Candidate must have a thorough understanding of the following:

  • Mixed-signal circuit design fundamentals
  • Mixed-signal circuit design and verification flows
  • Cadence analog design environment
  • Basic signal processing concepts

Familiarity with the following items is a plus:

  • Serial link design techniques
  • Data converter (ADCs and/or DACs) and/or clock synthesis and recovery (PLLs, DLLs, CDRs) techniques
  • MATLAB or C to facilitate architecture development
  • Hardware description languages such as SystemVerilog or VerilogA for functional model development
  • Scripting languages such as Perl or Python for automation
  • Silicon validation testing knowledge and experience

Other requirements:

  • Excellent verbal and written communication skills
  • Ph.D. EE degree with 5+ years or MS EE. degree with 7+ years of mixed signal design industry experience in advanced process technologies

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

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