2,055,457open jobs
121,570companies
242,473added this week
Browse all
Salary
≈ $133k – $279k per year (Estimated)
Location
In office (Austin)
Seniority
Architect · 10+ years exp
Visa
H-1B filings in 12 months: 368 · for this role: 109 · green card filings: 176
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 29, 2026. First seen by Alion on Oct 6, 2026. Cadence Design Systems scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Cadence Design Systems is an American software company founded in 1988 that supplies the electronic design automation tools engineers use to design and verify integrated circuits. Its products cover digital synthesis and place-and-route, custom and analogue design, circuit simulation with the Spectre and Virtuoso families, functional verification, and increasingly system-level analysis for packaging, thermal behaviour and computational fluid dynamics. Headquartered in San Jose and listed on Nasdaq, it also licenses design intellectual property such as processor and interface blocks, and competes primarily with Synopsys and Siemens EDA.
Backed by Sequoia Capital

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Solutions (North America) team is looking for an experienced candidate to lead Front End Design projects. This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion for innovation and a proven track record of success in the semiconductor industry.

This is a leadership role where you will be responsible for:

Technical Leadership:

Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment.

Design & Microarchitecture:

Define and develop microarchitectural features for IPs and subsystems, ensuring they meet PPA goals.

RTL Development:

Write, debug, and optimize RTL code in Verilog, SystemVerilog, or VHDL to create complex digital logic.

Verification & Signoff:

Oversee pre-silicon verification activities, including Lint, Clock Domain Crossing (CDC), Formal Verification (FV), and other quality checks.

Collaboration:

Work closely with cross-functional teams, including Design Verification (DV), Physical Design (PD), Architecture, and firmware engineers, to ensure successful delivery.

Qualifications:

*10+ years of Front End design and/or verification with a BS/MS Engineering or Computer Sciences

*Proven experience in leading and managing complex engineering projects

*Rich experience in IP creation and/or SoC and IP (CPU, Memory, Interface) integration

*Expert in RTL design (Verilog), simulators debuggers

*Hands on Experience in Synthesis, SDC creation and support PD and STA teams.

*Experience in driving results in multi-disciplinary organization

Desirable:

A Self-motivated person with good communication and design management skills

Experience with Cadence front end toolset

We’re doing work that matters. Help us solve what others can’t.

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
2,055,457 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Frontend
Similar stack
Same company
Austin
≈ $129k – $254k per year (Estimated) · In office · Contractor · San Ramon
JavaScript
Node JS
Frontend
GraphQL
Tailwind CSS
React.js
Vite
Remix
DevOps
Rest API
CI/CD
Git
GitHub
GitLab
Apply
IT Site Lead 1 day ago
≈ $158k – $311k per year (Estimated) · In office · Nationals only · Full-Time · Dallas
DevOps
IAM
Wi-Fi
Cybersecurity
Okta
Management
Jira
Defense
CMMC
Apply
$138k – $189k per year · Remote (United States) · 6+ years exp · United States
JavaScript
TypeScript
SQL
Node JS
Node JS
Express
Puppeteer
AI/ML
Copilot
Claude
ChatGPT
Frontend
Angular
React.js
DevOps
Rest API
Chef
CI/CD
Git
Trunk-Based Development
Management
Agile
QA
Selenium
Cypress
Jest
Apply
$118k – $225k per year · In office · TS/SCI · Full-Time · 8+ years exp · Bachelor's Degree · San Jose
Python
JavaScript
TypeScript
C++
Bash
Perl
C++
CMake
Databases
PostgreSQL
Neo4j
RabbitMQ
InfluxDB
Apache Kafka
Frontend
Angular
DevOps
Rest API
Git
Configuration Management
Linux
TCP/IP
BGP
OSPF
Management
Agile
Scrum
Apply
$96k – $181k per year · Hybrid · Full-Time · 7+ years exp · Bachelor's Degree · Brooklyn
JavaScript
Java
TypeScript
Dart
Java
Spring Boot
Spring Cloud
Databases
Redis
Apache Kafka
AI/ML
Copilot
Cursor
LangGraph
AutoGen
LangChain
Claude Code
Model Context Protocol
AI Agents
Gemini
Agentic Workflows
Frontend
Angular
Mobile
Flutter
DevOps
Rest API
GCP
GitLab CI
CI/CD
Git
Docker
Kubernetes
Platform Engineering
Google GKE
Management
Agile
QA
Swagger
Apply
≈ $83k – $189k per year (Estimated) · In office · Full-Time · 3+ years exp · Seoul
Verilog
C++
SystemVerilog
VHDL
SystemC
Chips/EDA
UVM
Cadence vManager
Apply
≈ $31k – $69k per year (Estimated) · In office · Full-Time · 12+ years exp · Bachelor's Degree · Bengaluru
Verilog
SystemVerilog
Chips/EDA
Synopsys VCS
Cadence Xcelium
UVM
Formal Verification
Apply
≈ $41k – $93k per year (Estimated) · Hybrid · Full-Time · 12+ years exp · Hsinchu
Python
Verilog
SystemVerilog
Perl
Apply
≈ $153k – $282k per year (Estimated) · Equity · In office · 5+ years exp · Bachelor's Degree · Irvine
Verilog
SystemVerilog
AI/ML
Copilot
ChatGPT
Fine-tuning
Chips/EDA
UVM
Apply
≈ $130k – $239k per year (Estimated) · Hybrid · Full-Time · 8+ years exp · Master's Degree · Plano
Verilog
SystemVerilog
Chips/EDA
Cadence Xcelium
UVM
Management
Agile
Apply
Frontend Engineer 10 months ago
In office · Full-Time · 3+ years exp · Bachelor's Degree · Beijing
Apply
In office · Full-Time · 7+ years exp · Bachelor's Degree · Bengaluru
Python
JavaScript
PHP
Verilog
SQL
SystemVerilog
Perl
Databases
MariaDB
Frontend
JQuery
DevOps
Rest API
Azure
Jenkins
GitHub
Linux
DNS
Apache HTTP Server
Cybersecurity
LDAP
Chips/EDA
UVM
Formal Verification
Management
Jira
Apply
≈ $83k – $189k per year (Estimated) · In office · Full-Time · 3+ years exp · Seoul
Verilog
C++
SystemVerilog
VHDL
SystemC
Chips/EDA
UVM
Cadence vManager
Apply
≈ $32k – $81k per year (Estimated) · In office · Full-Time · 10+ years exp · Bachelor's Degree · Guangzhou
AI/ML
Machine Learning
Apply
≈ $97k – $232k per year (Estimated) · In office · Full-Time · 15+ years exp · Bachelor's Degree · Seoul
Apply
≈ $85k – $197k per year (Estimated) · In office · Internship · Austin
Python
AI/ML
NumPy
Analytics
Matplotlib
Energy
PSS/E
PowerWorld
OpenDSS
Apply
≈ $145k – $269k per year (Estimated) · In office · 7+ years exp · Master's Degree · Austin
DevOps
CI/CD
Chips/EDA
Formal Verification
Apply
≈ $42k – $74k per year (Estimated) · In office · Full-Time · 1+ year exp · High School Diploma · Austin
Apply
≈ $145k – $269k per year (Estimated) · In office · 7+ years exp · Master's Degree · Austin
DevOps
CI/CD
Chips/EDA
Formal Verification
Apply
Tech lead 2 hours ago
$90k – $130k per year · In office · Austin
Python
Java
Python
FastAPI
Asyncio
Pydantic
Gunicorn
Uvicorn
pre-commit
AI/ML
Model Context Protocol
Function Calling
NumPy
LLM
Pillow
OpenAI
Anthropic
DevOps
Rest API
CI/CD
Docker
Nginx
Amazon S3
Linux
Cybersecurity
LDAP
QA
Pytest
Sentry
SpaceTech
Siemens NX
GD&T
Apply
See all jobs
This is one of many
2,055,457 more open roles from verified company boards, updated every day.