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Salary
≈ $53k – $99k per year (Estimated)
Location
In office (Gdańsk)
Seniority
Senior · 5+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 28, 2026. First seen by Alion on Mar 27, 2026. EER Poland scores C on the Alion truth index.

Overview
Company
Impact
Profile match
EER Poland is a Polish executive search and headhunting firm that fills hard-to-fill leadership, technology and engineering roles for employers in Poland and across the EMEA region, focusing on passive candidates who do not answer job ads. Run by its managing partner, it offers executive search, specialist headhunting, recruitment process outsourcing, IT contracting and market mapping, including support for companies expanding into Poland. Its job board lists client vacancies such as CTO, CIO and country manager searches, DevOps, embedded firmware, kernel and VLSI engineering roles, media buying, business development and project management positions in Warsaw, Gdansk, Krakow and remote.

About the Role

The position focuses on functional verification of advanced digital designs used in high-performance AI accelerator products for the cybersecurity and data-center market. The engineer will take ownership of verification activities for complex ASIC/SoC components, working closely with architecture, RTL, and software teams. This is a senior-level role designed for specialists who want to work on cutting-edge hardware in a rapidly growing deep-tech environment.

Key Responsibilities

  • Develop and execute verification plans based on architecture and RTL specifications.

  • Build, extend, and maintain UVM-based verification environments, including agents, drivers, sequencers, monitors, scoreboards, and checkers.

  • Implement constrained-random and coverage-driven verification methodologies.

  • Debug complex hardware and hardware/software interactions using industry-standard tools.

  • Collaborate with RTL designers, architects, and validation teams to identify issues and drive them to closure.

  • Analyze functional coverage, identify gaps, and ensure verification completeness.

  • Participate in subsystem and SoC-level integration and verification activities.

Required Qualifications

  • B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or a related field.

  • Minimum 5 years of hands-on experience in ASIC/SoC verification.

  • Strong proficiency in SystemVerilog, UVM, and constrained-random verification.

  • Solid understanding of digital design principles and RTL coding (Verilog/VHDL).

  • Experience with EDA simulation and debug tools from Synopsys, Cadence, or Siemens/Mentor.

  • Proven ability to debug complex digital logic and HW/SW interactions.

  • Strong analytical mindset, communication skills, and ability to work in multidisciplinary teams.

Preferred Qualifications

  • Experience with high-speed interfaces, memory subsystems, or AI/ML accelerators.

  • Familiarity with protocols such as AXI, PCIe, DDR, or CXL.

  • Experience building UVM environments from scratch.

What the Company Offers

  • Equity participation with long-term upside potential.

  • Full-time employment contract.

  • Work alongside top global experts in a highly specialized domain not commonly found in Poland.

  • Opportunity to join a fast-growing deep-tech company building unique AI hardware products.

  • Competitive compensation and long-term career growth within a stable, well-funded organization.

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