Technical Program Manager, Silicon Design Services and Strategic Extended Workforce
Confirmed on the employer's own hiring board on Oct 14, 2026. First seen by Alion on Sep 16, 2026. Google scores B on the Alion truth index.
About the job
A problem isn’t truly solved until it’s solved for all. That’s why Googlers build products that help create opportunities for everyone, whether down the street or across the globe. As a Technical Program Manager at Google, you’ll use your technical expertise to lead complex, multi-disciplinary projects from start to finish. You’ll work with stakeholders to plan requirements, identify risks, manage project schedules, and communicate clearly with cross-functional partners across the company. You're equally comfortable explaining your team's analyses and recommendations to executives as you are discussing the technical tradeoffs in product development with engineers.
Behind all of Google’s user-facing AI models, applications, and cloud services is an advanced data center infrastructure powered by custom silicon designed by Google.
As the Lead Technical Program Manager for Silicon Design Services and Strategic Extended Workforce, you will drive the end-to-end technical engagement, program management, and operational execution of our multi-vendor design services ecosystem. You will lead cross-functional programs spanning external partner selection (RFI/RFP), technical scoping, Statement of Work (SOW) drafting, and day-to-day execution across multiple development functions such as: Physical Design, Design for Test, Verification, and Silicon Engineering (SiEng/NPI). You will serve as the critical technical bridge between Google’s internal silicon design/architecture teams and external design partners, ensuring execution velocity, first-pass silicon quality, IP security, and commercial alignment.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Responsibilities
- Lead end-to-end program lifecycles for external design services from scoping, RFP, and SOW finalization through tapeout and production ramp.
- Establish multi-tiered vendor governance frameworks and drive critical technical, budgetary, and schedule tradeoff discussions between internal and external leadership.
- Partner with Google execution owners and vendors to align milestone deliverables, sign-off criteria, and dependency tracking for advanced node SoCs.
- Deploy secure Cloud CAD development environments and manage outsourced silicon NPI, including ATE test development and OSAT manufacturing handoffs.
- Define Key Performance Indicators (KPIs) and Service-Level Agreements (SLAs) to track milestone adherence, pro-actively mitigate critical-path program risks, and govern strategic commercial agreement terms.
Qualifications
Minimum qualifications:
- Bachelor's degree in a technical field, or equivalent practical experience.
- 8 years of experience in technical program management, project management, or silicon engineering leadership.
- Experience with the modern ASIC/SoC development lifecycle, including RTL design, verification (UVM/VIP), physical design (P&R/STA), DFT, and packaging.
- Experience managing external design service vendors, ASIC vendors, EDA vendors, or extended workforce engineering teams.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Industrial Engineering, Architecture, Construction Management or related technical fields.
- Experience managing 2 full SoC design cycles from early architecture/concept through tapeout to post-silicon bring-up/production.