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Salary
≈ $33k – $66k per year (Estimated)
Location
In office (Bengaluru)
Seniority
Staff

Confirmed on the employer's own hiring board on Oct 28, 2026. First seen by Alion on Oct 27, 2026.

Overview
Company
Impact
Profile match
HCLTech is a major Indian multinational information technology (IT) services and consulting company headquartered in Noida, Uttar Pradesh. Spun off from the original HCL Group in 1991, it ranks as one of India's largest technology companies alongside firms like TCS, Infosys, and Wipro.

Job Summary

Perform end-to-end physical design flow:

Floorplanning

Power planning (PG grid, IR)

Placement & optimization

CTS (Clock Tree Synthesis)

Routing

Post-route optimization

Achieve timing closure across all modes and corners

Resolve DRC, LVS, ERC and signoff violations

Handle low-power design techniques:

Multi-Vt, Multi-voltage (UPF)

Power gating, clock gating

Perform physical verification and signoff:

STA (Primetime)

SI / Crosstalk

IR drop & EM analysis

Work on advanced nodes (7nm, 5nm, 3nm or below)

Collaborate with:

RTL & Micro-architecture teams

DFT & Test engineers

Foundry and CAD teams

Debug complex timing, congestion, power, and variability issues

Drive methodology improvements and automation (scripts/flows)

Key Responsibilities

1. To leverage design expertise to ensure that software and products exhibit user-friendliness, intuitiveness, and alignment with user expectations, contributing to the creation of seamless user experiences.

2. To lead a team of designers, provide guidance, and ensuring the delivery of high-quality design solutions in alignment with the overall business goals.

3. To present design concepts and play a crucial role in shaping the overall design vision and strategy.

4. To stay abreast of industry trends, emerging technologies to drive innovation and excellence in design.

Skill Requirements

null

Other Requirements

null

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