Senior Digital Design Ingenieur

ICsense · Analog & Power Semiconductors · Semiconductor IP & Chip Design Services · Python · Verilog · SystemVerilog · VHDL · 24 days ago

Smart Apply

Similar jobs

2,072,180open jobs

126,710companies

241,445added this week

Browse all

Salary

≈ $74k – $168k per year (Estimated)

Location

In office (Heverlee)

Seniority

Senior · 4+ years exp

Employment

Full-Time

First seen by Alion on Oct 10, 2026.

Overview

Company

Impact

Profile match

ICsense

ICsense is a Belgian semiconductor design company founded in 2004 and based in Leuven. It develops custom analogue and mixed-signal integrated circuits for automotive, medical and industrial customers. The company belongs to TDK and has designed hundreds of production chips.

icsense.com · HQ: Leuven, Belgium · Analog & Power Semiconductors · Semiconductor IP & Chip Design Services · 11-50 employees · Est. 2004

Responsibilities

Study, specification, design and verification of high-quality digital and mixed-signal ICs
Write digital specifications for mixed-signal ICs, make area and power estimations
Technical team lead for the digital content of mixed-signal ASICs including interaction with customers, suppliers and the internal ASIC development team
Lead, attend and present at project/review meetings worldwide
Coach junior engineers in design, verification and testing of integrated circuits and improve their level of technical expertise and knowledge of the total business
Work together with international customers and communicate efficiently to successfully complete the project
Write documentation

Your profile

You are a dynamic and highly motivated engineer with at least four years of experience in digital IC design
You have experience with front-end ASIC or FPGA design in VHDL and/or Verilog and/or SystemVerilog
You have experience with front-end verification, preferably in SystemVerilog + UVM, to write directed tests, constrained randomized tests and to gather and interpret metrics such as code/condition/FSM/toggle/functional coverage
You have experience with digital synthesis, logic equivalence checking (LEC) and Static Timing Analysis (STA)
Experience with UPF and/or CPF and DFT and ATPG is a plus
Experience with scripting and programming languages such as Python and C is a plus
Experience with any of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM design, MCU
You are a self-motivated, efficient professional able to work alone or in teams
You offer quality and reliability to colleagues, customers and management, willing to share knowledge and able to communicate efficiently
You are fluent in English, both written and spoken

Free account

Stop reading job ads. Get the ones that fit.

One free account turns this page into a shortlist built around your stack, your level and your pay.

Match on every job. Stack, seniority, pay and location, scored against your profile.

2,072,180 open roles. Read straight off company career pages, refreshed every day.

Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.

3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.

Create a free account Continue with Google

Free forever. No card. Under a minute.

Your match

How well do you fit this role?

Two answers are enough for a real match. No account needed.

Check my fit

Answers stay in this browser until you create an account.

Recommended for you based on this role

Hardware

Similar stack

Same company

Heverlee

Senior Digital Design Engineer 4 hours ago

$40k – $53k per year · In office · Full-Time · Bachelor's Degree · Catania

Python

Verilog

SystemVerilog

Management

Agile

Apply