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Salary
≈ $26k – $53k per year (Estimated)
Location
In office (George Town)
Seniority
Staff
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 22, 2026. First seen by Alion on Oct 19, 2026. Lattice Semiconductor scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Lattice Semiconductor is a semiconductor company headquartered in Hillsboro, Oregon, designing low-power field programmable gate arrays (FPGAs), programmable logic devices and related software for compute, communications, industrial, automotive, consumer and aerospace markets. Founded in 1983 in Oregon's Silicon Forest and listed on Nasdaq, it describes itself as the largest supplier of small FPGAs by installed base, with design and operations centers in San Jose, Pune, Penang, Taipei, Manila and Shanghai. It hires IC and SoC design engineers, firmware and BMC engineers, silicon validation and foundry engineers, field applications engineers, product marketers and finance staff.

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

Responsibilities

  • Lead verification planning, execution, and sign-off for complex FPGA/ASIC IPs, subsystems, and SoC-level designs.
  • Define verification methodologies, test strategies, coverage goals, and closure criteria for project deliverables.
  • Architect and develop advanced SystemVerilog/UVM verification environments, reusable verification components, scoreboards, assertions, and coverage models.
  • Drive verification closure through functional coverage, code coverage, regression analysis, and risk assessments.
  • Lead debug of complex RTL, integration, low-power, timing, and gate-level simulation issues.
  • Collaborate with architects, RTL designers, validation engineers, firmware teams, and program managers to ensure successful product execution.
  • Provide technical leadership for verification methodologies, automation, infrastructure, and best practices across projects.
  • Mentor and guide verification engineers, perform design and verification reviews, and drive team technical excellence.
  • Support silicon bring-up, failure analysis, and root-cause investigations as required.
  • Drive continuous improvements in verification productivity, quality, and reusability.

Required Qualifications

  • Bachelor's or Master's degree in Electrical/Electronic Engineering, Computer Engineering, or related field.
  • 8+ years of ASIC/FPGA functional verification experience.
  • Strong expertise in SystemVerilog, UVM, and assertion-based verification.
  • Proven experience leading verification of complex IPs, subsystems, or SoCs from planning through sign-off.
  • Strong debugging skills in RTL, gate-level, and system-level verification environments.
  • Experience with constrained-random verification, coverage-driven verification, and regression management.
  • Proficiency in Python, Perl, Shell, or other scripting languages.
  • Excellent communication and cross-functional collaboration skills.

Preferred Qualifications

  • Experience with PCIe, USB, MIPI CSI/DSI, Ethernet, SerDes, USB, or similar high-speed protocols.
  • Experience with low-power verification (UPF/CPF).
  • Experience with GLS, timing validation, and post-silicon debug.
  • Experience driving verification methodology and infrastructure improvements across multiple projects.
  • Proven ability to mentor engineers and lead technical initiatives.

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

Malaysia

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

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