Principal Engineer - Design
Confirmed on the employer's own hiring board on Oct 22, 2026. First seen by Alion on Aug 5, 2026. Microchip Technology scores B on the Alion truth index.
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
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Job Description:
The Architecture Co-Verification team (ACOV) is an exciting, fast paced team responsible for enabling HW/FW development and co-verification of state-of-art System-On-Chip (SoC) devices using industry leading HW emulators (such as Cadence Palladium and Protium).
The team is deployed in all aspects of SoC development phases from architectural exploration to post-silicon validation, HW/FW co-development, pre-silicon functional co-verification, pre/post-silicon performance testing, power analysis, and critical post-silicon investigations.
As a Principal Design Engineer, you will be working closely with hardware designers, firmware engineers, and verification teams throughout the SoC development process. This is a role for a versatile engineer that enjoys the challenges of HW/FW co-development and system level co-verification using leading edge HW emulators and FPGA platforms. It’s a high visibility role that will develop a wide range of skills and exceptional problem-solving ability.
Responsibilities could include but are not limited to the following:
- Porting SoC RTL to industry leading HW emulators and FPGA platforms.
- Developing emulation specific HW for pre-silicon subsystem/system level co-verification.
- Developing common test ecosystem across pre/post silicon.
- Developing FW and tests for pre-silicon subsystem/system level co-verification.
- Troubleshoot and resolve complex problems in embedded multi-core real-time systems executing emulation test plans.
- Utilize state of the art protocol analyzers for analysis and error injection.
- Utilization of test and defect tracking tools to document and report on verification progress and product quality.
- Effectively present technical information to small teams of engineers.
Requirements/Qualifications:
- BS/MS degree or higher in Electrical/Electronic Engineering or Computer Engineering
- 10+ years of relevant work experience
- 5+ years' experience with one or more serial protocols such as SAS/SATA/NVMe and a thorough knowledge of PCIe
- Knowledge of key components of a server and storage solution including Windows/Linux host driver architectures.
- Willing to learn in a fast-paced environment, and being an organized self-starter.
- Proficient Linux experience and strong programming/scripting skills with languages such as C, Python, Tcl and Bash.
- Proficient in digital design, RTL coding with VHDL, Verilog, or System Verilog experience.
- Creation & management of system validation testing schedules and their execution.
- Knowledge of MIPS, ARM, or RISC-V architecture, including JTAG, I2C, and firmware programming.
Desired Skills:
- Excellent analytical and documentation skills.
- Strong problem solving, communication and interpersonal skills are required.
- Ability to quickly learn new technologies.
- Highly motivated team player who sets personal goals and achieves those goals without supervision.
- Experience with RAID HBA’s, SAS Controllers and their associated Software Testing Strategies in an asset.
- Experience with test automation, testing methodologies, and test tools
- Isolation and resolution of complex software & firmware problems in embedded real-time systems.
- Troubleshoot and resolve complex problems in embedded multi-core real-time systems.
- Knowledge of Embedded Linux development as well as RTOS constructs including processes, threads, scheduling, synchronization mechanisms, memory management.
- Cadence infrastructure support and process flows is an asset.
Travel Time:
0% - 25%Physical Attributes:
Carrying, Feeling, Handling, Hearing, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements:
Regular business hours; 70% sitting, 15% standing, 15% walkingPay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:Benefits of working at Microchip
The annual base salary range for this position, which could be performed in the US, is $75,000 - $232,000.**Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Incis an equal opportunity/affirmativeaction employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.