Physical Design Engineer
First seen by Alion on Oct 1, 2026.
Physical Design Engineer
Neurealm is looking for a skilled Physical Design Engineer with hands-on experience across the physical implementation flow for ASIC/SoC designs. The ideal candidate should have practical experience in floor planning, placement, CTS, routing, timing closure, and physical verification, along with strong debugging and problem-solving skills.
Key Responsibilities :
- Execute physical design activities including floor planning, placement, CTS, power routing, and place & route.
- Work on block-level and/or top-level physical implementation.
- Perform Static Timing Analysis (STA) and identify timing violations.
- Implement timing fixes and optimize designs for performance, area, and power.
- Perform and resolve DRC and LVS violations.
- Analyze physical design issues and work towards effective closure.
- Work with cross-functional teams including RTL design, STA, verification, and physical verification teams.
- Use industry-standard physical design tools such as Cadence Innovus and Tempus.
- Work on advanced technology nodes, preferably 14nm and below.
- Support physical design activities throughout the implementation and sign-off cycle.
- Participate in debugging sessions, design reviews, and technical discussions.
- Contribute to team problem-solving and maintain effective communication across teams.
Required Skills :
- 5 - 8 years of hands-on experience in Physical Design / ASIC Implementation.
- Strong experience in floor planning, placement, CTS, routing, and timing closure.
- Good understanding of power planning/power routing.
- Experience with Static Timing Analysis and timing optimization.
- Hands-on experience resolving DRC and LVS issues.
- Experience with tools such as Cadence Innovus and Tempus.
- Exposure to 14nm or advanced technology nodes.
- Good understanding of physical verification methodologies.
- Strong debugging and problem-solving skills.
- Good communication and collaborative working skills.
Preferred Skills :
- Experience working on block-level and top-level designs.
- Exposure to designs without a customer-specific flow.
- Knowledge of advanced physical design methodologies.
- Experience with physical design sign-off activities.
Skills
Physical Design, Primetime, Static Timing Analysis, Floor Planning, ASIC, SoC, RTL Design, RTL