FPGA Design Engineer

• Design and develop FPGA-based solutions using Verilog and VHDL.
• Develop and implement FPGA design constraints using SDC/XDC for synthesis, implementation, and timing closure.
• Implement and optimize DSP algorithms and processing blocks, including FFT, Pulse Compression, Waveform Generation, and related signal processing functions.
• Develop high-speed data acquisition and real-time signal processing pipelines.
• Work with Xilinx Vivado for synthesis, implementation, timing closure, and debugging.
• Design and integrate AXI-based architectures and interconnects, including AXI4, AXI-Stream, and AXI-Lite.
• Interface FPGA with external memories including DDR3, DDR4, and DDR5.
• Implement and validate communication and high-speed interface protocols, including Ethernet MAC (1GbE/10GbE) and other peripheral interfaces..
• Handle Clock Domain Crossing (CDC) and timing-related challenges to ensure robust FPGA operation.
• Configure and manage PLL/Clocking resources.
• Perform functional simulation, timing analysis.
• Collaborate with hardware, embedded, and signal processing teams for system integration hardware bring-up, and debugging.
• Use hardware debugging tools such as ILA, VIO for FPGA validation and troubleshooting.

Prepare design documentation, test reports, and support production/debug