MTS Verification Engineering
Overview
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional experienced Design Verification Engineer to join our SoftIP Products development team in Bangaluru, India. The successful candidate will participate in pre-silicon RTL Verification activities related to development and product-delivery of PCIe-Express related technologies. This is a Full Time position, reporting to the local onsite technical management.
Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite while also allowing for two days of remote work.
Responsibilities
Duties in this position will include:
- Testbench and test sequence development for verification of new controller technologies and features
- Functional coverage planning, coverage item coding, and test suite augmentation to achieve Functional Coverage
- Regression test development, monitoring, debug/triage, and correction to test environment, sequences, debug of controller RTL design
- Development & support of Verification environment scripting and capabilities
Qualifications
- Bachelors Degree or above in EE/CS, project experience related to HDL logic Design-Verification, with 4 to 8 years relevant work experience.
- SystemVerilog and/or UVM testbench, Verilog/SystemVerilog logic desig, /RTL familiarity/project work
- Pre-existing Experience / familiarity with PCI-Express protocol is highly desireable
- Working experience with Python and TCL scripting languages preferred
About Rambus
With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.