368,657open jobs
9,442companies
50,883added this week
Browse all
Location
In office (Bengaluru)
Seniority
Staff · 8+ years exp
Employment
Full-Time
Overview
Company
Impact
Profile match
SemiWiki is an open community-driven semiconductor web portal and knowledge-sharing platform dedicated to the global electronic design automation (EDA) and semiconductor manufacturing industries. Founded in 2010 by industry veterans Daniel Nenni, Paul McLellan, and David Manners, SemiWiki provides analysis, expert blogging, and commentary on advanced node semiconductor technology, chip design methodologies, foundry economics, and supply chain dynamics.

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.

Are you ready?

To learn more about SiFive’s phenomenal success and to see why we have won theGSA’s prestigious Most Respected Private Company Award(for the fourth time!), check out ourwebsite andGlassdoor pages.

Job Description:

Responsibilities:

  • Identify blocks suitable for applying Formal Verification

  • Create Formal Test-plan for blocks identifying properties to be implemented and sign-off metrics

  • Implementation and maintenance of Formal Verification environments in Chisel

  • Applying various FV techniques to reduce complexity and prove correctness of DUT

  • Debugging RTL to identify causes of failure scenarios

  • Guide and train team members on effective usage of Formal Verification tools

  • Develop/modify scripts to automate the verification process

  • Review formal setups and proofs with design and verification teams

  • Maintain and extend assertion libraries

Requirements:

  • 8+ years of experience in Formal Verification of Digital Hardware Design
  • Extensive experience with Formal Abstraction Techniques and sign-off process
  • Familiarity with industry-standard Formal Verification Tools, such as VC Formal, JasperGold
  • Knowledge of Hardware Description and Verification Languages, such as VHDL, Verilog/ SystemVerilog
  • Knowledge of Object-oriented Programming is a plus
  • A keen interest in Processors and Digital systems
  • Strong reasoning skills and excellent attention to detail
  • Good inter-personal and teamwork skills!

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

India

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
368,657 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Similar stack
Same company
Bengaluru
Synopsys 1 day ago
In office • 3+ years exp
SystemVerilog
Verilog
VHDL
Chips/EDA
Formal Verification
Synopsys SpyGlass
Synopsys VC Formal
Synopsys Verdi
Apply
$124k – $208k per year • In office • Full-Time • 2+ years exp • Bachelor's Degree • Austin • San Jose
C++
Python
SystemVerilog
Chips/EDA
Formal Verification
Apply
RTL Design Engineer 4 hours ago
$87k – $168k per year (Estimated) • In office • Full-Time • 2+ years exp • Bachelor's Degree • Austin • Phoenix • Hillsboro
Assembly
Perl
Python
SystemVerilog
Verilog
VHDL
Chips/EDA
Synopsys Design Compiler
Apply
$84k – $163k per year (Estimated) • In office • Full-Time • 1+ year exp • Bachelor's Degree • Folsom
SystemVerilog
Verilog
Chips/EDA
UVM
Apply
$65k – $174k per year (Estimated) • In office • Full-Time • 7+ years exp • Bachelor's Degree • Erlangen
SystemVerilog
VHDL
DevOps
CI/CD
Chips/EDA
Xilinx Vivado
Apply
$206k – $251k per year • In office • Full-Time • 5+ years exp • Master's Degree • Santa Clara • Hsinchu • Austin • Bengaluru • Berkeley
Apply
Remote/Hybrid • Full-Time • 2+ years exp • Master's Degree • Cambridge
Chisel
SystemVerilog
Verilog
VHDL
Apply
In office • Full-Time • 7+ years exp • Master's Degree • Cambridge • Austin • Boston
Chisel
Scala
SystemVerilog
Verilog
VHDL
DevOps
Git
Chips/EDA
FIRRTL
Management
Confluence
Jira
Apply
In office • Full-Time • 7+ years exp • Master's Degree • Cambridge • Austin • Boston
Chisel
Scala
SystemVerilog
Verilog
VHDL
DevOps
Git
Chips/EDA
FIRRTL
Management
Confluence
Jira
Apply
Staff Engineer 5 days ago
In office • Full-Time • 7+ years exp • Bachelor's Degree • Ahmedabad
Python
SystemVerilog
Chips/EDA
Formal Verification
UVM
Apply
$31k – $82k per year (Estimated) • In office • Full-Time • 3+ years exp • Hyderabad • Bengaluru
Apply
$31k – $73k per year (Estimated) • In office • Full-Time • 5+ years exp • Bengaluru
Apply
$16k – $34k per year (Estimated) • Remote/Hybrid • Full-Time • 2+ years exp • Bachelor's Degree • Mumbai • Bengaluru
JavaScript
PowerShell
SQL
C#
C#
.NET
Databases
Azure SQL Database
MS SQL
DevOps
Azure
Rest API
Cybersecurity
Microsoft Entra ID
QA
Postman
Swagger
Apply
$37k – $73k per year (Estimated) • In office • Internship • 4+ years exp • Bachelor's Degree • Bengaluru
Python
Scala
SQL
Databases
Apache Kafka
Databricks
AI/ML
ChatGPT
Copilot
Cursor
Spark
DevOps
AWS
Azure
CI/CD
GCP
Git
GitHub
Terraform
Apply
$41k – $89k per year (Estimated) • Remote/Hybrid • Full-Time • 8+ years exp • Bengaluru
C#
TypeScript
JavaScript
C#
.NET
Databases
Apache Kafka
AI/ML
Copilot
LLM
OpenAI
Frontend
Angular
GraphQL
DevOps
Azure
Azure AKS
Azure DevOps
CI/CD
Docker
GitHub
GitHub Actions
Grafana
Kubernetes
Prometheus
Rest API
Apply
See all jobs
This is one of many
368,657 more open roles from verified company boards, updated every day.