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Location
In office (Dresden)
Seniority
Senior · 5+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Nov 12, 2026. First seen by Alion on Dec 24, 2023. Semron scores B on the Alion truth index.

Overview
Company
Impact
Profile match
SEMRON is a German semiconductor company founded in 2020. It designs 3D-stacked memcapacitive chips for on-device AI inference. The technology targets low-power edge applications.

About the Role

We are seeking a Senior Analog IC Design Engineer to develop the analog and mixed-signal circuitry powering our CapRAM-based in-memory computing technology.

You will take ownership of critical circuit blocks from specification through silicon implementation, working closely with system architects, device engineers, digital designers, and layout engineers.

Locations:

Dresden, Germany (On-site)

Austin, USA (On-site)

What you will do:

  • Design and optimize transistor-level analog and mixed-signal circuits for CapRAM-based in-memory computing architectures, with a focus on power, performance, area, and precision.
  • Develop precision analog building blocks, including amplifiers, comparators, biasing circuits, voltage and current references, and charge-domain circuits.
  • Design ultra-low-power ADCs, memory-array peripheral circuits, and sensing and readout interfaces.
  • Design and optimize power-management, supply-conditioning, and high-voltage programming circuits.
  • Perform comprehensive circuit analysis and verification, including stability, noise, PVT, Monte Carlo, and post-layout simulations.
  • Collaborate with system architects and device engineers to translate system requirements into circuit specifications and implementations.
  • Work closely with layout engineers to ensure robust physical implementations, addressing matching, parasitics, and signal integrity.
  • Support silicon bring-up, characterization, debugging, and the development of reusable analog IP.

What you should bring in:

  • Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or a related field.
  • Minimum 5 years of hands-on industry experience in analog or mixed-signal CMOS IC design.
  • Strong understanding of semiconductor device physics, transistor-level circuit operation, and analog design trade-offs.
  • Solid foundation in feedback theory, small-signal AC analysis, frequency response, loop stability, compensation techniques, gain and phase margins, and settling behavior.
  • Strong understanding of precision and ultra-low-power circuit techniques, including noise, mismatch, offset, linearity, and low-voltage design.
  • Knowledge of capacitive and switched-capacitor circuit techniques, including charge redistribution, charge injection, leakage, and parasitic effects.
  • Proficiency with EDA tools and industry-standard analog design and verification methodologies.
  • Experience with at least one complete IC development cycle, including tape-out.
  • Strong system-level mindset.
  • Effective team communication.

Helpful but not required:

  • Experience with SAR ADCs, charge-redistribution ADCs, dynamic comparators, and advanced low-power amplifier techniques.
  • Experience with analog in-memory computing, emerging memory technologies, or capacitive sensing and readout circuits.
  • Familiarity with high-voltage programming techniques, level shifting, LDOs, and power-supply design.
  • Understanding of analog circuit nonidealities and their impact on system-level computational accuracy.
  • Experience with silicon characterization, debugging, and behavioral modeling using Verilog-A, MATLAB, or Python.
  • Experience working in a semiconductor startup or an early-stage technology development environment

Why us?

We offer the opportunity to develop innovative AI hardware accelerator based on SEMRON's proprietary CapRAM technology in a dynamic startup environment with challenging technical problems, opportunities for professional growth and close collaboration with a multidisciplinary team across analog, digital, device, and system engineering. You will have significant technical ownership of circuit architecture and design through silicon validation.
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