ASIC Digital Design, Staff Engineer

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You bring solid experience in RTL design with a focus on building hardware that must be both performant and secure. Your work in digital design has taught you that security cannot be an afterthought, it must be architected into the IP from the beginning. You understand the interplay between hardware design decisions and security implications, and you make design choices that account for both functional correctness and threat resilience.

You are effective at working with incomplete specifications. When requirements need clarification, you ask the right questions to uncover intent before committing to an implementation. Your debugging approach is systematic, you trace issues through logic and simulation environments until you identify root cause, not symptoms.

Your experience with UVM or formal verification has shown you that thorough verification is what separates IP that works in the lab from IP that works in production. You take verification seriously and advocate for comprehensive test coverage. At Synopsys, you will contribute to Security IP development for applications where reliability and trust are critical requirements.

What You'll Be Doing

• Design and implement RTL in Verilog and SystemVerilog for Security IP cores, translating security requirements into synthesizable, verifiable hardware
• Build and maintain test environments for digital hardware Security IP using SystemVerilog and UVM, ensuring coverage of corner cases and attack scenarios
• Verify IP cores and subsystems using modern verification techniques including UVM testbenches and formal verification tools
• Collaborate with hardware and software security engineers to analyze functional correctness and performance of embedded IP solutions across threat models
• Contribute to detailed design specifications, verification plans, and documentation that support global development and customer integration
• Work within an international team across time zones, coordinating design reviews, debugging sessions, and milestone deliveries

The Impact You Will Have

• Strengthen the security posture of IP cores that protect critical systems in automotive, AI, and high-performance computing applications
• Enable faster SoC integration by delivering IP that meets strict performance, power, and area requirements without compromising security
• Reduce customer risk and time-to-market by ensuring IP is verified to the highest standards before it ships
• Advance the state of hardware security design within Synopsys, contributing techniques and methods that influence future IP development
• Support the growth of Synopsys Security IP in high-growth markets where trust and resilience are non-negotiable
• Help maintain Synopsys' leadership position in delivering silicon IP that customers depend on for differentiation and compliance

What You'll Need

• Strong working knowledge of RTL design for hardware IP components, with hands-on experience writing synthesizable Verilog or SystemVerilog
• Experience with ASIC verification using SystemVerilog, UVM, or Verilog in real project environments
• Ability to create detailed test environment specifications that map requirements to verification objectives
• MSc or PhD in Electrical Engineering, Computer Science, or a related technical discipline
• Solid understanding of IC design flows including synthesis, timing analysis, and design-for-test concepts
• Strong problem-solving and debugging skills, with the ability to trace issues across RTL, simulation, and tooling layers
• Experience with hardware security concepts or cryptographic IP is a plus

Who You Are

• You can explain a complex design tradeoff to a software engineer or an architect in two sentences without losing the technical nuance
• You are comfortable working in a distributed team where decisions get made asynchronously and where clarity in writing matters as much as clarity in code
• You do not wait for perfect documentation, you work with what you have, fill in gaps through questions, and move forward with confidence
• You are detail-oriented in a way that matters, you catch the edge case in a state machine before it becomes a bug report three months later
• You treat verification as a first-class discipline, not an afterthought, and you advocate for test coverage even when schedules are tight

The Team You'll Be Part Of

You will be joining the Security IP team in Porto, a dynamic group focused on extending Synopsys Security IP into markets including CyberSecurity, High Performance Computing, Artificial Intelligence, and Automotive. The team is made up of hardware and software security experts working together to develop state-of-the-art IP cores and subsystems. Collaboration, creativity, and a commitment to excellence define how the team operates.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.