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Salary
$110k – $156k per year
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In office (Austin, 8am - 3pm)
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Senior
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Confirmed on the employer's own hiring board on Nov 2, 2026. First seen by Alion on Nov 1, 2026.

Overview
Company
Impact
Profile match
Tech Mahindra is a prominent Indian multinational information technology services and consulting enterprise specializing in digital transformation, cloud modernization, business process re-engineering, and network services. Headquartered in Pune, Maharashtra, India (with its registered office in Mumbai), the company is a flagship entity of the diversified Mahindra Group conglomerate. Established in 1986 (initially as Mahindra British Telecom), it operates across dozens of countries with a global delivery footprint serving enterprise clients in telecommunications, banking and financial services, healthcare, automotive, and retail. The organization is particularly recognized for its deep engineering heritage in telecommunications and 5G network integration, offering end-to-end solutions spanning artificial intelligence, enterprise application management, customer experience (CX), and next-generation connectivity infrastructure.
Backed by Seafund

Job Description

  • Skill Set :

    RTL,ASIC

  • Total Experience :

    8.00 to 15.00 Years

  • No of Openings :

    1

  • Job Post Date :

    28/10/2026

  • Job Expiry Date :

    04/12/2026

  • Domain :

    IT

  • Location :

    AUSTIN [United States]

  • Job Reference No :

    4115270

Job Summary

About Us:

At Tech Mahindra (Tech Mahindra | Connected World, Connected Experiences), we live the philosophy of connected world and connected experiences. We thrive on change that is powered by the intelligent symphony of technology and humans designing meaningful and sustainable experiences. Consumer ‘experiences’ are driving and disrupting industries like never before. Businesses must build seamless yet simple enterprises that collaborate, synergize, and drive the change. Change that connects us all and empowers us to deliver experiences that span across the digital, the physical, the convergent, and everything in between. That’s when truly connected experiences manifest.

Extraordinary is when experiences come together - a continuous convergence of digital technologies, touchpoints, and most importantly people. It’s time to reimagine, reinvent, and revolutionize business models & operations as well as to transform enterprises into living, breathing, and connected businesses. We are the Digital Change makers who strive to change the way the world, communities, businesses, and humans interact digitally. We are harnessing the power of change, brought in by technologies, that makes it the most exciting time to be alive in human history. Our universe, as we build it, disrupt it, and redesign it, is powering the digital change.

Tech Mahindra represents the connected world, offering innovative and customer-centric information technology experiences, enabling Enterprises, Associates, and the Society to Rise. It has 150,000+ professionals working for 1000+ Global Customers (including Fortune 500 companies) in 90 Countries. We’re part of the esteemed Mahindra group, headquartered in India. Under a new CEO, Tech Mahindra is committed to a transformative journey with 'Scale @ Speed' as our guiding principle.

Title - ASIC/RTL Design Engineer 5

Location: San Jose, CA (Onsite)

Position Summary:

JOB DUTIES:

  • You will build behavioral models of analog and mixed-signal circuits (PLLs, clocking, ADC/DAC, TX/RX analog front ends, calibration loops) in SystemVerilog.
  • Those models drop into a SystemVerilog UVM verification environment used for high-speed SerDes and SoC IP.
  • You will work closely with analog circuit designers, RTL designers and verification engineers. Successful candidates will be responsible for leading, and participating in, the modeling and verification of leading-edge designs in advanced CMOS processes.
  • Our modeling engineers are expected to contribute in all of the following areas:
    • Reading schematics, netlists and circuit specifications to define what each model must capture
    • Developing model architecture and accuracy targets, balancing fidelity against simulation speed
    • Writing behavioral SystemVerilog models of analog blocks
    • Validating models against transistor-level simulation results
    • Debugging simulation failures and finding the root cause in the model, RTL or testbench
    • Documenting model behavior, limitations and interfaces

EXPERIENCE AND EDUCATION:

  • Hands-on experience writing behavioral models of analog circuits in SystemVerilog.
  • Working knowledge of analog and mixed-signal circuit fundamentals and of the SystemVerilog UVM methodology, with proven skill debugging failures in simulation and waveforms.
  • Familiarity with high-speed interface standards is a plus.

Comments for Suppliers:

  • Manager is looking for a candidate with RTL coding experience but also Analog Design/Modeling experience.
  • Manager would like to see experience with VCS and LTSPICE and HSPICE simulation.

The payrate is $55/hr. to $78/hr. C2C

“Tech Mahindra is an Equal Employment Opportunity employer. We promote and support a diverse workforce at all levels of the company. All qualified applicants will receive consideration for employment without regard to race, religion, color, sex, age, national origin, or disability. All applicants will be evaluated solely based on their ability, competence, and performance of the essential functions of their positions with or without reasonable accommodations. Reasonable accommodations also are available in the hiring process for applicants with disabilities. Candidates can request a reasonable accommodation by contacting the company ADA Coordinator at [email protected].”

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