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Salary
≈ $31k – $72k per year (Estimated)
Location
In office (Hyderabad)
Seniority
Middle · 4+ years exp

Confirmed on the employer's own hiring board on Oct 17, 2026. First seen by Alion on Oct 9, 2026.

Overview
Company
Impact
Profile match

UST

UST is a digital transformation and technology services company that partners with clients to deliver AI-driven solutions and business outcomes. It hires data scientists, Salesforce integration specialists, Java, .NET and Node.js developers, mainly in Thiruvananthapuram, Kochi, Bengaluru and Hyderabad. The company is headquartered in Thiruvananthapuram, Kerala, India.

Who we are:

At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 30+ countries, we build for boundless impact-touching billions of lives in the process. Visit us at .

Summary:

UST is looking for a Senior SoC/FPGA Verification Engineer with strong expertise in C/C++ based pre-silicon verification, embedded processor validation, and UVM-based verification methodologies.

The Opportunity:

We are seeking an experienced Verification Engineer to drive pre-silicon verification of complex FPGA and SoC platforms. This role requires deep expertise in software-driven verification, embedded processor validation, and verification framework development. The ideal candidate will work closely with architecture, RTL, firmware, and validation teams to ensure robust system functionality and first-pass silicon success.

Key Responsibilities:

  • Develop and execute comprehensive verification strategies for FPGA and SoC designs
  • Create C/C++ based testcases and verification frameworks for embedded processor and subsystem validation
  • Develop and enhance SystemVerilog/UVM testbenches for IP, subsystem, and SoC-level verification
  • Verify CPU, memory, DMA, interrupt, boot, and peripheral subsystems across multiple use cases
  • Drive coverage-driven verification using constrained-random and directed testing methodologies
  • Develop assertions, checkers, scoreboards, and coverage models to improve verification quality
  • Debug complex functional issues across RTL, firmware, and system-level environments
  • Collaborate with architecture, design, firmware, and validation teams throughout the development cycle
  • Develop automation and productivity enhancements using Python, Shell, Perl, and Tcl scripting
  • Participate in design reviews, verification sign-offs, and methodology improvements.

Required Qualifications

  • Bachelor's or Master's degree in Electronics & Communication Engineering, Electrical Engineering, Computer Engineering, or related field
  • 4+ years of experience in FPGA/ASIC Functional Verification
  • Strong expertise in C-based or embedded software-driven pre-silicon verification
  • Hands-on experience in developing C/C++ testcases and verification frameworks for FPGA/SoC verification
  • Experience with RISC-V, ARM-based SoCs, or embedded CPU verification
  • Strong understanding of FPGA architectures and SoC subsystem design
  • Good knowledge of memory architectures, interrupts, DMA, boot flows, and embedded processors
  • Experience with SystemVerilog and UVM verification methodologies
  • Strong understanding of constrained-random, directed, coverage-driven, and assertion-based verification techniques
  • Strong scripting skills in Python, Shell, Perl, and Tcl
  • Excellent debugging, analytical, and problem-solving skills
  • Strong verbal and written communication skills

Preferred Qualifications

  • Experience in end-to-end SoC verification and subsystem integration
  • Knowledge of AMBA protocols such as AXI, AHB, and APB
  • Experience with simulation tools such as VCS, Xcelium, or Questa
  • Familiarity with firmware-driven verification environments
  • Experience in verification automation and regression infrastructure development
  • Exposure to FPGA prototyping and post-silicon validation is a plus
  • Experience leading verification efforts and mentoring junior engineers

Leadership Expectations

  • Drive verification strategy and execution for complex FPGA/SoC programs
  • Champion software-driven verification methodologies and best practices
  • Ensure comprehensive coverage closure and verification sign-off quality
  • Mentor team members and provide technical guidance across verification activities
  • Collaborate effectively across architecture, design, firmware, and validation teams
  • Identify risks early and proactively drive issue resolution to meet project milestones

What we believe:

We’re proud to embrace the same values that have shaped UST since the beginning. Since day one, we’ve been building enduring relationships and a culture of integrity. And today, it's those same values that are inspiring us to encourage innovation from everyone to champion diversity and inclusion and to place people at the centre of everything we do.

Humility:

We will listen, learn, be empathetic and help selflessly in our interactions with everyone.

Humanity:

Through business, we will better the lives of those less fortunate than ourselves.

Integrity:

We honour our commitments and act with responsibility in all our relationships.

Equal Employment Opportunity Statement

UST is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion, or sexual orientation.

All employment decisions shall be made without regard to age, race, creed, colour, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law.

USTreserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.

  • To support and promote the values of UST.

  • Comply with all Company policies and procedures
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