Emulation engineer

This role is for one of Weekday’s clients

Min Experience: 6+ years

Location: Bengaluru, Hyderabad

JobType: full-time

We are looking for a highly skilled Emulation Engineer with 6-16 years of experience in pre-silicon validation, hardware emulation, and verification of complex semiconductor designs. The ideal candidate will have strong hands-on expertise with Zebu and Palladium emulation platforms and a solid understanding of pre-silicon validation methodologies. You will work closely with design, verification, architecture, and software teams to validate hardware functionality before silicon tape-out and identify potential issues early in the development lifecycle.

Requirements

Key Responsibilities

• Drive pre-silicon validation and hardware emulation activities for complex SoC, processor, subsystem, or IP designs.
• Develop and execute emulation-based validation strategies to verify functionality, performance, and system-level behavior before silicon availability.
• Set up, configure, and debug designs on Zebu and Palladium emulation platforms.
• Develop and maintain emulation environments, test infrastructure, validation flows, and automation frameworks.
• Port and execute simulation and verification test cases on emulation platforms and analyze failures.
• Debug hardware, firmware, and software interactions using emulation systems and identify root causes of functional issues.
• Collaborate with RTL design, verification, architecture, firmware, and post-silicon validation teams to resolve complex issues.
• Support early software and firmware bring-up using emulation platforms before first silicon.
• Analyze emulation results, logs, waveforms, traces, and system behavior to identify design defects.
• Optimize emulation environments for improved compile, build, runtime, and debug efficiency.
• Develop reusable scripts and automation utilities to streamline validation and regression processes.
• Contribute to validation planning, test coverage analysis, regression execution, and defect tracking.
• Support methodology improvements and establish best practices for scalable pre-silicon validation.

Must-Have Skills

• 6-16 years of relevant experience in hardware verification, emulation, pre-silicon validation, or related semiconductor engineering roles.
• Strong hands-on experience in pre-silicon validation of SoCs, processors, IPs, or complex hardware systems.
• Proven experience working with Zebu emulation platforms.
• Strong experience with Palladium emulation platforms.
• Good understanding of hardware verification methodologies, validation flows, and debugging techniques.
• Experience developing and executing test plans and validation scenarios on emulation platforms.
• Strong understanding of RTL-based hardware development and system-level validation.
• Ability to debug complex hardware/software interaction issues in a pre-silicon environment.
• Strong analytical and problem-solving skills with the ability to independently investigate difficult validation failures.
• Experience working collaboratively with cross-functional teams including RTL design, verification, firmware, and architecture teams.

Good-to-Have Skills

• Proficiency in Perl scripting for automation, test execution, log processing, and validation workflows.
• Experience with additional scripting or automation languages such as Python or Tcl.
• Exposure to simulation and verification tools and methodologies such as SystemVerilog, UVM, or equivalent.
• Experience with firmware/software bring-up and system-level debugging on emulation platforms.
• Understanding of CPU, GPU, networking, storage, memory, or other complex SoC subsystems.

Ideal Candidate

The ideal candidate is a technically strong emulation professional who combines deep hands-on experience with Zebu, Palladium, and pre-silicon validation with excellent debugging and collaboration skills. You should be comfortable working on complex hardware problems, developing effective validation strategies, automating repetitive workflows, and partnering with multiple engineering teams to ensure robust designs before silicon tape-out.