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Salary
$39k – $89k per year (Estimated)
Location
In office (Bengaluru)
Seniority
Staff
Employment
Full-Time

Confirmed on the employer's own hiring board on Sep 23, 2026. First seen by Alion on Sep 23, 2026. Weekday scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Weekday is an Indian recruitment company that sources software engineers through referrals from other engineers rather than through job advertisements or agency databases. Its model pays working engineers to vouch for former colleagues they rate, turning informal knowledge about who is genuinely good into a searchable candidate pool that companies can hire from. Based in Bengaluru and backed by Y Combinator, the platform has layered AI screening and outbound sourcing on top of that referral network, and sells to startups and technology companies hiring in the Indian market.

This role is for one of Weekday’s clients

Min Experience: 11+ years

Location: Bengaluru

JobType: full-time

We are looking for an experienced Physical Design Lead to drive end-to-end physical implementation of complex SoC/IP designs from netlist to GDSII.

Key Responsibilities:

  • Lead physical design implementation from floorplanning through placement, CTS, routing, optimization and signoff.
  • Own timing closure across setup, hold, MCMM and ECO iterations.
  • Drive physical design methodologies, quality and implementation schedules.
  • Work closely with RTL, synthesis, STA, DFT, architecture and verification teams.
  • Analyze and resolve congestion, timing, power, IR drop, EM and signal-integrity issues.
  • Review design constraints, implementation reports and signoff results.
  • Mentor physical design engineers and provide technical direction.
  • Participate in methodology development and flow optimization.

Requirements

Required:

  • 10+ years of hands-on Physical Design experience.
  • Strong experience in RTL-to-GDSII implementation.
  • Proven expertise in floorplanning, placement, CTS, routing and timing closure.
  • Strong understanding of STA, MCMM, ECO and physical verification.
  • Experience with industry-standard EDA tools such as Cadence Innovus, Synopsys ICC2/Fusion Compiler and PrimeTime.
  • Strong Tcl/Perl/Python scripting skills are desirable.

Good to Have:

Experience with advanced technology nodes, hierarchical/top-level implementation, low-power designs, IR/EM analysis and complex SoC integration.

Must-have skills

Physical Design, floor-planning, Place & Route

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