Staff Compute Systems Engineer

Zoox is developing the first ground-up, fully autonomous vehicle fleet and the supporting ecosystem required to bring this technology to market. Sitting at the intersection of artificial intelligence, robotics, and design, Zoox aims to provide the next generation of mobility-as-a-service in urban environments. We're looking for top talent that shares our passion and wants to be part of a fast-moving and highly execution-oriented team.

As a Staff Compute & Controls Systems Engineer in Advanced Hardware Engineering (AHE), you will be responsible for developing and documenting requirements for compute and control system modules, while also driving key functional safety analyses for our compute platforms. You will work across departments at Zoox to build a system-level understanding of how AHE hardware enables critical operational functions, and you will lead the Compute Safety Analysis (FMEDA) that ensures those functions fail safely. You will work closely with hardware and software architects, and with design, safety, manufacturing, and test engineers, to ensure requirements are verified throughout the engineering development process. Your assessments will be critical to meeting milestones as we develop new generations of hardware.

In this role, you will:

• Apply compute, controls, and systems engineering principles to define traceable computing requirements from product goals
• Engage with product, HW/SW engineering, production, safety, and business teams to author detailed requirements for compute and control modules.
• Analyze tradeoffs and drive consensus with product, hardware, and software teams to converge on compute architecture for current and new vehicle platforms.
• Gather and analyze critical data to define metrics, qualify systems for release, and influence system design decisions based on evidence-based insights.
• Create and maintain clear, precise documentation to support system designs, architectural decisions, and processes while ensuring cross-team alignment.
• Work with software and firmware teams during implementation to ensure requirements are met.
• Lead the sign-off of compute and autonomy systems with cross-functional teams.
• Assist with the development and review of Verification and Validation (V&V) plans, and analyze test results for compute and controls systems.
• Conduct System FMEA (SFMEA) and failure mode analysis in the context of part-level reliability to identify and mitigate potential failure modes early in the design cycle.
• Support Root Cause Analysis (RCA) for safety-related compute platform field failures.
• Collaborate with partner teams to improve diagnostic coverage against single-point and multiple-point latent failures on existing hardware platforms.
• Support functional safety analyses to ensure the safety concept remains compatible with the core objectives of ISO 26262.

Qualifications

• B.S., M.S., or equivalent degree in Aerospace, Automotive, Robotics, Computer Science, Electrical, Mechanical, or Systems Engineering.
• 8+ years of relevant, staff-level experience in automotive, ADAS, autonomous vehicles, aerospace, or robotics, with an emphasis on systems-level design, validation, and safety analysis for complex, mission-critical systems with high levels of fail-operational redundancy.
• Analytical skills and a passion for writing clear, concise, and verifiable requirements for owned compute and controls systems.
• Strong EE fundamentals, including knowledge of compute architectures (e.g., x86, ARM), communication protocols (I2C, UART, SPI, CAN, LIN, USB, GMSL, FPD-Link), high-speed signals, sensing, and power electronics.
• Experience with FMEDA or FMEA for safety-critical systems, as well as automotive safety standards such as ISO 26262 (Functional Safety) and ISO 21448 (SOTIF).

Bonus Qualifications

• PhD in a related technical field.
• Experience working on high assurance compute solutions and GPU hardware, along with knowledge of AI models used for perception, behavior planning, and trajectory planning.
• Experience with sensor interface design and data throughput analysis, including bandwidth, latency, and timing/synchronization requirements across the compute architecture.
• Experience with hazard analysis, functional decomposition, validation, and verification.