SiFive
sifive.com
Actively hiring
Processors, MCUs & AI Chips
Semiconductor IP & Chip Design Services
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Salaries
Products
People
Growth
Offices
Jobs
Financials
How SiFive hires
Truth index
A 95/100
Median time to fill
76 days
Ghost roles
0%
Stale roles
0%
Reposted roles
0%
SiFive scores A on the Alion truth index (A is best, E worst), measured over 21 open roles re-checked against its own hiring board: 0% look like ghost listings, 0% have gone stale and 0% are the same role posted again. Its roles close in a median of 76 days. It measures how much of what this employer publishes turns into a real, finite search - not the employer as a workplace. How the index is computed
Visa sponsorship
- United States · H-1B filings in 12 months: 6
- United Kingdom · Licensed UK visa sponsor (Senior or Specialist Worker, Skilled Worker)
Overview
SiFive is an American semiconductor company founded in 2015 by the Berkeley researchers who created the RISC-V instruction set, and it designs processor cores that others license and build into their own chips. Its business is an alternative to Arm: because RISC-V is an open standard rather than a proprietary architecture, customers can extend the instruction set for their own workloads without negotiating with the architecture owner, which has drawn interest from companies building custom artificial intelligence and automotive silicon. Headquartered in Santa Clara, it licenses cores to chipmakers, cloud operators and defence customers rather than manufacturing anything itself.
News
SiFive pushes development server to take RISC-V into the datacenter
Rack-mount system intended for software porting, workload optimization, to bring open standard to the bitbarn
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SiFive brings RISC-V servers with Ubuntu 26.04 and RHEL 10 for code developers
To solve the chicken-and-egg problem for RISC-V in data centers, SiFive is providing developer servers with 32 RVA23 cores, 256 GB RAM, and PCIe 5.0.
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SiFive Drives RISC-V Into The Data Center With BigSky Server Platform
SiFive debuted its BigSky SF-2U870 2U server platform at Hot Chips, delivering 32 P870 RISC-V cores, 256GB DDR5 memory, and enterprise Linux.
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SiFive Raises $400 Million to Accelerate High-Performance RISC-V Data Center Solutions; Company Valuation Now Stands at $3.65 Billion
SiFive, the gold standard for RISC-V processor IP, today announced it has raised $400 million in an oversubscribed Series G financing to accelerate its high-...
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Tech stack
Technologies named in job postings at SiFive over the last 12 months, by layer, with the share of postings for each.
Technologies in use
100
Postings analysed
135
Stack modernity
72/100AI adopter
Languages
SystemVerilog52%
Python39%
Chisel31%
Verilog30%
Frameworks & libraries
UVM28%
MLIR6%
PyTorch3%
PyTorch C++3%
Databases
PostgreSQL1%
Redis1%
Cloud & platforms
GitHub15%
Linux11%
Kubernetes2%
U-Boot2%
AI & ML
LLM1%
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Full SiFive tech stack
100 technologies · by team · pay by technology · changes · similar stacks
Salary insights
Compensation ranges based on this company's open jobs
Median
$219k
Typical range
$171k – $342k
Open positions
23
21
Jobs
Middle
23.8%
Senior
19%
Staff
19%
Principal
9.5%
Architect
28.6%
| Level | Jobs | Median | Typical range |
|---|---|---|---|
| Middle | 5 | $219k | $171k – $251k |
| Senior | 4 | $219k | $194k – $251k |
| Staff | 4 | $235k | $194k – $283k |
| Principal | 2 | $283k | $283k |
| Architect | 6 | $297k | $194k – $342k |
Highest paying role
Distinguished Formal Verification Architect
$342k
Normalized to USD per year
All salaries at SiFive
By role, level and city, against the market · 23 jobs with pay
Products
Custom Core Design
Engineering work adapting cores to a specific customer's workload and instruction extensions. This is the capability that a fixed architecture licence cannot offer, and it is the company's clearest argument against the incumbent.
sifive.com
Essential Series
Configurable cores for embedded and general-purpose use across a wide performance range. It is the volume catalogue that gives customers a starting point without commissioning a bespoke engagement, and it is how most new licensees enter.
sifive.com
Automotive Series
Functional safety qualified cores for vehicle applications. Automotive certification takes years and locks a supplier into a platform for its production life, which makes these design wins particularly valuable.
sifive.com
Intelligence Series
Cores with vector processing designed for machine learning workloads at the edge and in data centres. Vector extensions are where RISC-V's ability to be customised matters most, because artificial intelligence workloads change faster than architectures normally do.
sifive.com
Processor Core IP
Licensable RISC-V processor cores ranging from small embedded controllers to high-performance application processors. Customers pay licence fees and per-chip royalties, which means revenue arrives years after the design work is done.
sifive.com
People
Krste Asanovic
Co-founder and Chief Architect
Krste Asanovic co-created the RISC-V instruction set at Berkeley and co-founded the company to commercialise it. He chairs the RISC-V International board that governs the standard.
Yunsup Lee
Co-founder
Yunsup Lee co-founded the company after working on the original RISC-V implementations at Berkeley. He has led its processor engineering organisation.
Andrew Waterman
Co-founder
Andrew Waterman co-created RISC-V as a graduate student and wrote much of its original specification. He co-founded the company alongside his Berkeley colleagues.
Naveed Sherwani
Executive Officer, Director
Stefan Dyckerhoff
Director
Shiva Natarajan
Executive Officer
Todd Dagres
Director
Kirk Bowman
Director
Names and roles come from public filings, company registers and the company's own site. Is this you? Correct or remove · How we handle this data
Growth
Hiring Momentum
58/100
Growing
Open positions
111
11 opened / 8 closed in 30 days
Median time-to-fill
72 days
faster than 18% of the market
ATS activity
Every ~14 hours
10/15/2026
Hiring Dynamics
+100%
Hiring Focus
The percentage next to each role is its share of the company's job openings over the last 90 days; the arrow shows the shift versus the previous period.
Hardware
72%
Industrial Engineering
11% ▲
DevOps
7% ▼
Backend
5% ▼
AI/ML
1% ▲
QA
1%
Actively hiring for Hardware (+10 in 30 days)
Activity Timeline
Added Cadence Innovus to stack
Oct 2026
Added TypeScript to stack
Sep 2026
Added SQL to stack
Sep 2026
Added Rest API to stack
Sep 2026
Added Edge AI to stack
Sep 2026
Added OCaml to stack
Sep 2026
Added Hadoop to stack
Sep 2026
Added eBPF to stack
Sep 2026
Added Rust to stack
Sep 2026
Added Red Hat to stack
Sep 2026
Added Debian to stack
Sep 2026
Added AI Agents to stack
Sep 2026
Offices
Where the company hires and what each office is for
Cities
11
Hiring now
11
Countries
4
Busiest office
Santa Clara
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Headquarters
Builds here
Office with open vacancies
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Santa Clara
United States
HQ
Santa Clara, CA
44 open roles 32 posted in 90 days 89% engineering 500-1000 est. staff $239k Avg Salary
hires for Hardware, DevOps, Backend
Austin
United States
Engineering / R&D
Santa Clara, CA
41 open roles 28 posted in 90 days 95% engineering 200-500 est. staff $242k Avg Salary
hires for Hardware, DevOps, Industrial Engineering
Bengaluru
India
Plant / site
Bengaluru, India
33 open roles 22 posted in 90 days 67% engineering 200-500 est. staff $235k Avg Salary
hires for Hardware, Industrial Engineering, DevOps
Hsinchu
Taiwan
Engineering / R&D
Hsinchu, Taiwan
26 open roles 17 posted in 90 days 88% engineering 200-500 est. staff $242k Avg Salary
hires for Hardware, DevOps, Industrial Engineering
Boston
United States
Engineering / R&D
Cambridge, United Kingdom
22 open roles 12 posted in 90 days 100% engineering 200-500 est. staff $242k Avg Salary
hires for Hardware, DevOps, Backend
Hyderabad
India
Engineering / R&D
Hyderabad, India
13 open roles 13 posted in 90 days 100% engineering 50-200 est. staff
hires for Hardware, Backend
Cambridge
United Kingdom
Plant / site
Cambridge, United Kingdom
12 open roles 7 posted in 90 days 100% engineering 50-200 est. staff $243k Avg Salary
hires for Hardware
Berkeley
United States
Plant / site
Santa Clara, CA
10 open roles 6 posted in 90 days 100% engineering 50-200 est. staff $227k Avg Salary
hires for Hardware, DevOps, Backend
Ahmedabad
India
Plant / site
Ahmedabad, India
2 open roles 2 posted in 90 days 100% engineering 10-50 est. staff
hires for Hardware
New York
United States
Plant / site
Santa Clara, CA
2 open roles 2 posted in 90 days 100% engineering 10-50 est. staff $283k Avg Salary
hires for DevOps, Hardware
Washington
United States
1 open roles 1 posted in 90 days 100% engineering 10-50 est. staff $283k Avg Salary
hires for DevOps
Earlier presence
La Ciotat, France
Jobs
≈ $34k – $72k per year (Estimated) • In office • Full-Time • 6+ years exp • Hyderabad
SystemVerilog
Machine Learning
Chips/EDA
UVM
Apply
≈ $23k – $59k per year (Estimated) • In office • Full-Time • 4+ years exp • Bachelor's Degree • Bengaluru
Python
Machine Learning
DevOps
Platform Engineering
Chips/EDA
Cadence Innovus
Synopsys Fusion Compiler
Apply
≈ $36k – $75k per year (Estimated) • In office • Full-Time • 7+ years exp • Bachelor's Degree • Bengaluru
Machine Learning
Apply
$159k – $194k per year • Equity • In office • Full-Time • 5+ years exp • Bachelor's Degree • Santa Clara
C++
Machine Learning
DevOps
RTOS
Git
Linux
Management
Confluence
Jira
Apply
In office • Full-Time • Master's Degree • Hsinchu
Python
C++
PyTorch C++
LLVM
AI/ML
TFLite
Transformers
TensorFlow
PyTorch
LLM
Triton
LiteRT
ONNX Runtime
MLIR
IREE
Machine Learning
Apply
≈ $29k – $73k per year (Estimated) • In office • Full-Time • 3+ years exp • Master's Degree • Hsinchu
Python
C++
PyTorch C++
LLVM
AI/ML
vLLM
CUDA Toolkit
SGLang
OpenCL
TGI
PyTorch
LLM
CUDA
Triton
ROCm
MLIR
KV Cache
Machine Learning
Apply
≈ $82k – $187k per year (Estimated) • In office • Full-Time • 7+ years exp • Master's Degree • Cambridge • Austin • Boston
Verilog
Scala
SystemVerilog
VHDL
Chisel
Machine Learning
DevOps
Git
Chips/EDA
FIRRTL
Management
Confluence
Jira
Apply
≈ $19k – $47k per year (Estimated) • In office • Full-Time • 5+ years exp • Bachelor's Degree • Ahmedabad
Python
SystemVerilog
Machine Learning
Chips/EDA
UVM
Formal Verification
Apply
≈ $22k – $55k per year (Estimated) • In office • Full-Time • 5+ years exp • Hyderabad • Bengaluru
Verilog
SystemVerilog
VHDL
Chisel
Machine Learning
Chips/EDA
Cadence JasperGold
Formal Verification
Synopsys VC Formal
Apply
≈ $22k – $56k per year (Estimated) • In office • Full-Time • 5+ years exp • Bachelor's Degree • Hyderabad
SystemVerilog
Machine Learning
Chips/EDA
Cadence Xcelium
UVM
Synopsys Verdi
Apply
≈ $23k – $59k per year (Estimated) • In office • Full-Time • 4+ years exp • Bachelor's Degree • Bengaluru
Python
C++
SystemVerilog
Machine Learning
Chips/EDA
Formal Verification
Apply
≈ $76k – $176k per year (Estimated) • Equity • In office • Full-Time • 3+ years exp • Bachelor's Degree • Cambridge • Austin • Boston
Verilog
Scala
SystemVerilog
Chisel
Bluespec
Machine Learning
DevOps
Git
GitHub
Chips/EDA
Synopsys SpyGlass
Management
Confluence
Jira
Apply
Financials
Total raised
$400M
Latest round
Series G
Funding rounds
1
Funding rounds
| Round | Announced | Amount | |
|---|---|---|---|
| Series G | 2026 | $400M | Details |