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Confirmed on the employer's own hiring board on Sep 27, 2026. First seen by Alion on Jul 18, 2022.

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About Us Elevating RISC-V to world class performance levels. Akeana is a venture funded, RISC-V, startup founded in early 2021 by leaders in the industry.

General RTL Engineer

Come join our start-up where we are working on an exciting SOC and processor design.

The existing team has deep and broad experience in design and development of many successful state-of-the-art products.

Collectively, our team has previous experience on a wide range of processor, IO, and SOC designs at Intel, Motorola, IBM, Sun, Mips, Broadcom and Marvell.

We are funded by top-tier VC’s and other respected semi-conductor industry leaders.

For the RTL design position, we are looking for:

  • Strong background in RTL design, with experience in Micro-architecture development, pipelining, timing closure, power, and area.
  • Experience with IO’s, memory interfaces, and bus interfaces is a plus.
  • Experience with integrating IP’s and glue-logic development.

You will be working with a small close-knit team and own a significant piece of the design.

As an RTL designer you will also be interacting with Architecture, Verification and Physical Design.

This is a great opportunity to join an early-stage startup and work on exciting designs with significant responsibility.

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