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Confirmed on the employer's own hiring board on Sep 27, 2026. First seen by Alion on Jul 18, 2022. Akeana scores B on the Alion truth index.

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About Us Elevating RISC-V to world class performance levels. Akeana is a venture funded, RISC-V, startup founded in early 2021 by leaders in the industry.

Senior Design Verification Engineer

Join and be part of an exciting startup in the semiconductor space!

We are a well-funded early-stage startup doing processor design.

The company was founded by industry veterans from Broadcom/Marvell/Sun Microsystems/Intel, who have taken multiple successful high-performance CPUs to tape-out and production.

If you have a strong background in processors, great problem-solving skills, an eye for detail, and a can- do attitude, reach out to us, to explore opportunities.

For this position, we are looking for:

  • Strong background in unit/cluster-level verification, of a complex CPU or Cache Coherent sub- system
  • Processor architecture (such RiscV, ARM, Mips, Solaris, x86) or Cache coherency experience, and experience in previous processor verification is a plus.
  • Strong programming background in System Verilog or C++. UVM experience desirable.
  • Good knowledge of assembly or C-programming a plus

You will be working with a small close-knit team and own 1 or more areas of verification.

As a DV engineer you will also be interacting with Architecture, and RTL design closely.

This is a great opportunity to join an early-stage startup and work on exciting designs with significant responsibility.

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