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Confirmed on the employer's own hiring board on Sep 30, 2026. First seen by Alion on Oct 8, 2024. Akeana scores B on the Alion truth index.

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About Us Elevating RISC-V to world class performance levels. Akeana is a venture funded, RISC-V, startup founded in early 2021 by leaders in the industry.

Machine Learning Hardware/Software Codesign Engineer

Come join our start-up where we are working on exciting processor and ML accelerator design.

The existing team has deep and broad experience in design and development of many successful state-of-the-art processors and machine learning acceleration products. Collectively, our team has previous experience on x86, SPARC, PowerPC, 68k, MIPS, ARM and RISC-V processor designs at Intel, Motorola, IBM, Sun, MIPS, Broadcom and Marvell. We are funded by top-tier VC’s and other respected semi-conductor industry leaders. In addition, our team has extensive experience in Machine Learning accelerators and software with a deep background in DSP, signal processing, and numerical acceleration.

For the ML Hardware/Software co-design position, we are looking for:

  • Strong background in python/pytorch with hands on ML experience.
  • Have a passion for software architecture, APIs and high-performance extensible software.
  • Have experience with ML systems, particularly for on-device inference scenarios.
  • Know how to perform comprehensive analyses (for performance, power, accuracy, etc.) starting from first principles of various deep learning techniques and benchmarking to test/prove ideas; system optimizations including building out analytical models as well as implementing prototypes.
  • Have knowledge of computer architecture (CPU and GPU), understand performance modeling and analysis of computer systems, and how to optimize code for a given platform.
  • Programming and software design skills (proficiency in C/C++).
  • Are collaborative and product-focused with excellent communication skills.
  • Masters or PhD or equivalent experience in relevant discipline (CS, CS&E, CE).
  • Hands on experience moving models from pytorch into MLIR is a plus as is experience optimizing inference performance with triton. Familiarity with Tensor RT or other ML run time is a plus.

You will be working with a small close-knit team and own a significant piece of the design and software stack. As an ML HW/SW co-design engineer you will also be interacting with Architecture, RTL design, Verification, Physical Design providing requirements guidance, performance analysis, for the hardware and the software stack. Core ML is an example of an external facing product from this role.

In this role you’ll be digging into the latest research about efficient on-device inference. You’ll prototype new approaches to improve inference on critical models without sacrificing accuracy. You’ll do deep dive analysis of both our software stack as well as our hardware and come up with innovative ways to improve.

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