Design Verification Infrastructure & Performance Engineer
Confirmed on the employer's own hiring board on Nov 2, 2026. First seen by Alion on Sep 25, 2026. AMD scores B on the Alion truth index.
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Design Verification Infrastructure & Performance Engineer
THE ROLE:
Silicon Design Engineer will work with RTL, Design Verification, and Infrastructure teams to improve simulation and build flows for AMD silicon development. The role focuses on optimizing runtime and memory usage, automating workflow improvements, and increasing overall verification and design productivity.
THE PERSON:
The ideal candidate is a collaborative and detail-oriented engineer with strong scripting and software development skills, solid Unix knowledge, and familiarity with HDL-based design environments. They should be comfortable analyzing technical bottlenecks, driving methodology improvements, and working across multiple engineering teams to implement scalable solutions.
KEY RESPONSIBILITIES:
- Drive enhancements in simulation and build methodologies
- Partner with RTL, DV, and Infrastructure teams to improve engineering workflows
- Analyze simulation performance and identify runtime/memory bottlenecks
- Develop automation and tools to detect inefficient coding practices
- Coordinate with infrastructure engineers to adopt industry-standard workflows
- Improve simulation speed in complex constrained-random and coverage-driven verification environments
- Support continuous process and tool improvements across the silicon design ecosystem
PREFRRED EXPEREINCE:
- Experience with scripting languages such as Python, Perl, Shell, and/or Ruby
- Understanding of object-oriented programming principles
- Experience of Unix/Linux systems
- Experience with Git and/or Perforce
- Knowledge of Verilog/SystemVerilog/UVM
- Exposure to simulation, build systems, or verification methodology optimization
- Knowledge of SQL/database administration is a plus
- LSF knowledge is a plus
ACADEMIC CREDENTIALS:
BS in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
Design Verification Infrastructure & Performance Engineer
THE ROLE:
Silicon Design Engineer will work with RTL, Design Verification, and Infrastructure teams to improve simulation and build flows for AMD silicon development. The role focuses on optimizing runtime and memory usage, automating workflow improvements, and increasing overall verification and design productivity.
THE PERSON:
The ideal candidate is a collaborative and detail-oriented engineer with strong scripting and software development skills, solid Unix knowledge, and familiarity with HDL-based design environments. They should be comfortable analyzing technical bottlenecks, driving methodology improvements, and working across multiple engineering teams to implement scalable solutions.
KEY RESPONSIBILITIES:
- Drive enhancements in simulation and build methodologies
- Partner with RTL, DV, and Infrastructure teams to improve engineering workflows
- Analyze simulation performance and identify runtime/memory bottlenecks
- Develop automation and tools to detect inefficient coding practices
- Coordinate with infrastructure engineers to adopt industry-standard workflows
- Improve simulation speed in complex constrained-random and coverage-driven verification environments
- Support continuous process and tool improvements across the silicon design ecosystem
PREFRRED EXPEREINCE:
- Experience with scripting languages such as Python, Perl, Shell, and/or Ruby
- Understanding of object-oriented programming principles
- Experience of Unix/Linux systems
- Experience with Git and/or Perforce
- Knowledge of Verilog/SystemVerilog/UVM
- Exposure to simulation, build systems, or verification methodology optimization
- Knowledge of SQL/database administration is a plus
- LSF knowledge is a plus
ACADEMIC CREDENTIALS:
BS in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.