Gate Level Design Verification

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GATE-LEVEL DESIGN VERIFICATION ENGINEER

THE ROLE:

Join our Design Verification team and contribute to the gate-level validation of next-generation, high-performance x86 processors and related IP. You will gain hands-on experience in post-synthesis verification, low-power validation, simulation, debugging, and automation while collaborating with experienced engineers across design and verification teams.

THE PERSON:

You are a motivated and detail-oriented engineer with an interest in digital design and hardware verification. You enjoy solving technical problems, investigating unexpected simulation results, and learning how complex processor designs are validated.

You have good communication and organizational skills and are comfortable working collaboratively in a technical team environment. You are also curious, willing to learn, and able to approach engineering problems in a structured and methodical way.

KEY RESPONSIBILITIES:

• Contribute to post-synthesis and gate-level verification activities for high-performance microprocessor designs and related IP.
• Run gate-level simulations, analyze results, and assist with debugging functional and design issues.
• Support gate-level low-power verification and netlist validation activities.
• Develop and maintain scripts and automation tools used in gate-level build and simulation flows.
• Help improve verification methodologies, simulation environments, and reusable workflows.
• Verify design behavior against relevant architectural and design specifications.
• Create and maintain verification documentation, including test plans, testbench information, and methodology guidelines.
• Participate in technical reviews and share verification findings with peers and relevant stakeholders.
• Collaborate with RTL design, physical design, architecture, IP, methodology, and verification teams.
• Contribute to the timely delivery of reliable and high-quality verification results.

PREFERRED EXPERIENCE:

• Knowledge of a hardware description language such as Verilog or SystemVerilog.
• Familiarity with hardware simulation tools such as VCS, ModelSim, or similar EDA simulators.
• Experience with scripting languages such as Python, Shell, Perl, or Ruby.
• Familiarity with Unix or Linux operating environments.
• Knowledge of version-control tools such as Git or Perforce.
• Exposure to digital design verification, gate-level simulation, post-synthesis verification, low-power verification, or netlist validation.
• Understanding of digital logic, computer architecture, or microprocessor design concepts.
• Familiarity with x86 architecture or high-performance processor designs is an advantage.
• Interest in developing automation tools that improve verification efficiency and productivity.

ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

GATE-LEVEL DESIGN VERIFICATION ENGINEER

THE ROLE:

Join our Design Verification team and contribute to the gate-level validation of next-generation, high-performance x86 processors and related IP. You will gain hands-on experience in post-synthesis verification, low-power validation, simulation, debugging, and automation while collaborating with experienced engineers across design and verification teams.

THE PERSON:

You are a motivated and detail-oriented engineer with an interest in digital design and hardware verification. You enjoy solving technical problems, investigating unexpected simulation results, and learning how complex processor designs are validated.

You have good communication and organizational skills and are comfortable working collaboratively in a technical team environment. You are also curious, willing to learn, and able to approach engineering problems in a structured and methodical way.

KEY RESPONSIBILITIES:

• Contribute to post-synthesis and gate-level verification activities for high-performance microprocessor designs and related IP.
• Run gate-level simulations, analyze results, and assist with debugging functional and design issues.
• Support gate-level low-power verification and netlist validation activities.
• Develop and maintain scripts and automation tools used in gate-level build and simulation flows.
• Help improve verification methodologies, simulation environments, and reusable workflows.
• Verify design behavior against relevant architectural and design specifications.
• Create and maintain verification documentation, including test plans, testbench information, and methodology guidelines.
• Participate in technical reviews and share verification findings with peers and relevant stakeholders.
• Collaborate with RTL design, physical design, architecture, IP, methodology, and verification teams.
• Contribute to the timely delivery of reliable and high-quality verification results.

PREFERRED EXPERIENCE:

• Knowledge of a hardware description language such as Verilog or SystemVerilog.
• Familiarity with hardware simulation tools such as VCS, ModelSim, or similar EDA simulators.
• Experience with scripting languages such as Python, Shell, Perl, or Ruby.
• Familiarity with Unix or Linux operating environments.
• Knowledge of version-control tools such as Git or Perforce.
• Exposure to digital design verification, gate-level simulation, post-synthesis verification, low-power verification, or netlist validation.
• Understanding of digital logic, computer architecture, or microprocessor design concepts.
• Familiarity with x86 architecture or high-performance processor designs is an advantage.
• Interest in developing automation tools that improve verification efficiency and productivity.

ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.