Design Verification Engineer

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Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE:

We are looking for a motivated and detail-oriented Design Verification Engineer to join our growing team. In this role, you will work within the Infinity (Data) Fabric IP team and collaborate with Design Verification, micro benchmarking, design, and architecture engineers. You will gain exposure to verification techniques and methodologies used during the pre-silicon development of modern microprocessors while contributing to IP verification, feature enablement, debug activities, and deliverable validation. Your work will help support the delivery of high-quality IP releases that meet SoC project requirements and schedules.

THE PERSON:

You are a detail-oriented engineer with an interest in modern processor architectures, digital design, and verification. You have strong analytical and problem-solving skills and enjoy investigating technical challenges. You work well in a collaborative environment, communicate effectively with others, and are comfortable working with engineers across different teams, sites, and time zones.

KEY RESPONSIBILITIES:

• Collaborate with architects, IP designers, verification, physical design, and program management teams to support feature integration and delivery.
• Develop and maintain test plan documentation, considering interactions across hardware and software components.
• Create, execute, and maintain directed and constrained-random verification tests.
• Assist with integration issue triage, helping to identify whether issues originate from the IP, design flow, or environment.
• Use simulation and debug tools (e.g., VCS, Verdi) to analyze failures and support root cause investigation.
• Work with RTL and firmware engineers to help resolve design and integration issues.
• Maintain IP documentation, including release details, integration guidelines, feature lists, and known issues.
• Support automation efforts using scripting languages such as Python or Perl to improve validation and release workflows.

PREFERRED EXPERIENCE:

• Understanding of computer architecture concepts, including interconnects and cache coherency.
• Knowledge of digital design and verification methodologies, such as UVM.
• Ability to analyze simulation results and assist with technical issue resolution.
• Familiarity with simulation, emulation, and debug tools.
• Knowledge of object-oriented programming concepts, preferably using C++ and/or SystemVerilog.
• Experience with scripting languages such as Python, Perl, Shell, or Ruby.
• Experience working in a Unix/Linux environment.
• Good verbal and written communication skills in English.
• Exposure to scripting and automation tools used to improve engineering workflows.
• Familiarity with formal verification concepts and tools is a plus.

ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.

LOCATION:

• Iasi, Romania (hybrid)

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

We are looking for a motivated and detail-oriented Design Verification Engineer to join our growing team. In this role, you will work within the Infinity (Data) Fabric IP team and collaborate with Design Verification, micro benchmarking, design, and architecture engineers. You will gain exposure to verification techniques and methodologies used during the pre-silicon development of modern microprocessors while contributing to IP verification, feature enablement, debug activities, and deliverable validation. Your work will help support the delivery of high-quality IP releases that meet SoC project requirements and schedules.

THE PERSON:

You are a detail-oriented engineer with an interest in modern processor architectures, digital design, and verification. You have strong analytical and problem-solving skills and enjoy investigating technical challenges. You work well in a collaborative environment, communicate effectively with others, and are comfortable working with engineers across different teams, sites, and time zones.

KEY RESPONSIBILITIES:

• Collaborate with architects, IP designers, verification, physical design, and program management teams to support feature integration and delivery.
• Develop and maintain test plan documentation, considering interactions across hardware and software components.
• Create, execute, and maintain directed and constrained-random verification tests.
• Assist with integration issue triage, helping to identify whether issues originate from the IP, design flow, or environment.
• Use simulation and debug tools (e.g., VCS, Verdi) to analyze failures and support root cause investigation.
• Work with RTL and firmware engineers to help resolve design and integration issues.
• Maintain IP documentation, including release details, integration guidelines, feature lists, and known issues.
• Support automation efforts using scripting languages such as Python or Perl to improve validation and release workflows.

PREFERRED EXPERIENCE:

• Understanding of computer architecture concepts, including interconnects and cache coherency.
• Knowledge of digital design and verification methodologies, such as UVM.
• Ability to analyze simulation results and assist with technical issue resolution.
• Familiarity with simulation, emulation, and debug tools.
• Knowledge of object-oriented programming concepts, preferably using C++ and/or SystemVerilog.
• Experience with scripting languages such as Python, Perl, Shell, or Ruby.
• Experience working in a Unix/Linux environment.
• Good verbal and written communication skills in English.
• Exposure to scripting and automation tools used to improve engineering workflows.
• Familiarity with formal verification concepts and tools is a plus.

ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.

LOCATION:

• Iasi, Romania (hybrid)

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.