Product Development Engineer
Confirmed on the employer's own hiring board on Oct 23, 2026. First seen by Alion on Sep 15, 2026. AMD scores B on the Alion truth index.
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THE ROLE:
As Product Development Engineer specializing in System Level Test (SLT), you will own hands-on debug execution across product bring-up, production ramp, and sustaining support. This role requires strong technical depth in SLT flows, platform enablement, diagnostics, BIOS/OS/firmware interactions, failure triage, and data-driven issue resolution to drive products from first silicon readiness through stable manufacturing execution.
The successful candidate will serve as a primary technical owner for SLT debug, working closely with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT partners to isolate issues, drive containment and corrective actions, and ensure timely readiness for release and sustaining needs. The ideal candidate is a strong hands-on problem solver who can connect system-level failures to actionable engineering paths and maintain execution discipline across multiple products and debug priorities.
KEY RESPONSIBILITIES:
- Own SLT debug execution across bring-up, production ramp, and sustaining phases, ensuring issues are triaged, contained, and driven to closure
- Drive structured debug of SLT failures across test content, test flow, platform, diagnostics, BIOS/OS/firmware, hardware, and manufacturing interactions
- Lead first-pass triage, failure reproduction, isolation experiments, data collection, and issue characterization to identify root cause and next-step ownership
- Partner with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT teams to resolve product and flow readiness blockers
- Analyze yield, failure pareto, first-test-rate, repeatability, coverage, and test time data to identify debug priorities, execution risks, and improvement opportunities
- Support SLT bring-up readiness by validating test flows, platform stability, diagnostics availability, data logging, automation, and release package completeness
- Drive debug closure for production excursions, yield loss, test escapes, flow instability, hardware interactions, and OSAT execution issues
- Document debug findings, containment actions, root-cause status, lessons learned, and recommended flow or coverage improvements
- Communicate debug status, risks, blockers, and recovery plans clearly to technical leads, program stakeholders, and cross-functional partners
PREFERRED EXPERIENCE:
- 5~10 years’ experience in Product Development Engineering.
- Hands-on experience in System Level Test, Product Engineering, Test Engineering, platform validation, silicon debug, or manufacturing test support
- Strong experience owning debug activities during silicon bring-up, qualification readiness, production ramp, and sustaining support
- Practical knowledge of SLT test flows, diagnostics, BIOS/OS/firmware dependencies, platform readiness, failure logging, automation, and release package validation
- Demonstrated ability to isolate complex system-level failures using structured experiments, data analysis, reproduction methods, and cross-functional debug plans
- Strong understanding of yield, failure pareto, first-test-rate, repeatability, test time, coverage, and quality metrics used to guide product and manufacturing decisions
- Ability to work effectively with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT partners to close debug issues
- Strong communication skills with the ability to summarize debug status, risks, blockers, root-cause progress, and recovery actions clearly and concisely
- Ability to operate with ownership, urgency, and technical discipline in a fast-paced environment with parallel bring-up, and sustaining priorities
ACADEMIC CREDENTIALS:
- BS/MS in Electrical / Electronics Engineering, Computer Engineering, or comparable disciplines
LOCATION:
Hsinchu, Taiwan
- #LI-JW3
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE:
As Product Development Engineer specializing in System Level Test (SLT), you will own hands-on debug execution across product bring-up, production ramp, and sustaining support. This role requires strong technical depth in SLT flows, platform enablement, diagnostics, BIOS/OS/firmware interactions, failure triage, and data-driven issue resolution to drive products from first silicon readiness through stable manufacturing execution.
The successful candidate will serve as a primary technical owner for SLT debug, working closely with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT partners to isolate issues, drive containment and corrective actions, and ensure timely readiness for release and sustaining needs. The ideal candidate is a strong hands-on problem solver who can connect system-level failures to actionable engineering paths and maintain execution discipline across multiple products and debug priorities.
KEY RESPONSIBILITIES:
- Own SLT debug execution across bring-up, production ramp, and sustaining phases, ensuring issues are triaged, contained, and driven to closure
- Drive structured debug of SLT failures across test content, test flow, platform, diagnostics, BIOS/OS/firmware, hardware, and manufacturing interactions
- Lead first-pass triage, failure reproduction, isolation experiments, data collection, and issue characterization to identify root cause and next-step ownership
- Partner with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT teams to resolve product and flow readiness blockers
- Analyze yield, failure pareto, first-test-rate, repeatability, coverage, and test time data to identify debug priorities, execution risks, and improvement opportunities
- Support SLT bring-up readiness by validating test flows, platform stability, diagnostics availability, data logging, automation, and release package completeness
- Drive debug closure for production excursions, yield loss, test escapes, flow instability, hardware interactions, and OSAT execution issues
- Document debug findings, containment actions, root-cause status, lessons learned, and recommended flow or coverage improvements
- Communicate debug status, risks, blockers, and recovery plans clearly to technical leads, program stakeholders, and cross-functional partners
PREFERRED EXPERIENCE:
- 5~10 years’ experience in Product Development Engineering.
- Hands-on experience in System Level Test, Product Engineering, Test Engineering, platform validation, silicon debug, or manufacturing test support
- Strong experience owning debug activities during silicon bring-up, qualification readiness, production ramp, and sustaining support
- Practical knowledge of SLT test flows, diagnostics, BIOS/OS/firmware dependencies, platform readiness, failure logging, automation, and release package validation
- Demonstrated ability to isolate complex system-level failures using structured experiments, data analysis, reproduction methods, and cross-functional debug plans
- Strong understanding of yield, failure pareto, first-test-rate, repeatability, test time, coverage, and quality metrics used to guide product and manufacturing decisions
- Ability to work effectively with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT partners to close debug issues
- Strong communication skills with the ability to summarize debug status, risks, blockers, root-cause progress, and recovery actions clearly and concisely
- Ability to operate with ownership, urgency, and technical discipline in a fast-paced environment with parallel bring-up, and sustaining priorities
ACADEMIC CREDENTIALS:
- BS/MS in Electrical / Electronics Engineering, Computer Engineering, or comparable disciplines
LOCATION:
Hsinchu, Taiwan
- #LI-JW3
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.