Physical Design Engineer
Confirmed on the employer's own hiring board on Nov 7, 2026. First seen by Alion on Nov 5, 2026. Apple scores A on the Alion truth index.
Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
Description
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Working with logic design team to understand partition architecture and drive physical aspects early in design cycle; Completing netlist to GDS2 implementation for partition(s) meeting schedule and
design goals; Timing, physical & electrical verification, driving the signoff closure for the partitions; and Resolving design and flow issues related to physical design, identify potential solutions and drive execution. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.
PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Minimum Qualifications
Master's degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field.
Experience and/ or education must include:
Knowledge and implementation design with Innovus and Fusioning Compiler APR tools.
Tuning flows/methodologies and improvement of the power, performance and area of designs.
Static timing analysis and timing convergence techniques. IR/IVD analysis and violation fix techniques,. LVC/DRC debug and fix skill.
Physical design on latest technology nodes 7nm and beyond, modern CMOS technology and fabrication basic.
Blocking level design including floorplan, placement, Clock tree synthesis, routing and ECO steps.
Lowering power Design techniques including clock gating, power gating, multi-voltage domain design
Scripting language skill: Tcl, Perl, Python, automation.
Understanding top-down and bottom-up design approach, knowledgeable handle interblock design related issue in timing and PDV related problems.
Preferred Qualifications
N/A