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Salary
≈ $102k – $203k per year (Estimated)
Location
In office (San Jose)
Seniority
Junior · 2+ years exp
Visa
H-1B filings in 12 months: 77 · for this role: 54 · green card filings: 7

Confirmed on the employer's own hiring board on Nov 6, 2026. First seen by Alion on Jul 6, 2026. Astera Labs scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Astera Labs is a fabless semiconductor company specializing in advanced connectivity solutions for artificial intelligence and cloud infrastructure. Headquartered in San Jose, California, the firm designs integrated circuits, modules, and software that eliminate data bottlenecks between processors, memory, and network devices. Through its intelligent connectivity platform, it enables hyperscalers and data center operators to build scalable, high-performance computing systems.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

System Validation Engineer 

Role Overview 

Astera Labs is seeking System Validation Engineers to lead post-silicon bring-up and system validation for high-performance PCIe fabric switch products used in AI and cloud data centers. As part of the AI Fabric Engineering group, you will design and execute validation plans, automate data-centric test flows, drive root-cause investigations across silicon, firmware, hardware, and systems, and work directly with customers to validate real-world performance and interoperability. 

Based in San Jose, you will collaborate with cross-functional teams to certify products against demanding system requirements and prepare new silicon and platforms for customer integration and launch. This is an opportunity to help shape validation strategy, automation infrastructure, and debug methodologies for purpose-built connectivity solutions enabling rack-scale AI infrastructure. 

Success Looks Like 

  • New silicon and platforms are brought up on schedule with reproducible validation results.
  • Automated test suites reduce manual effort and provide clear pass/fail, compliance, and performance metrics.
  • System issues are resolved rapidly through data-backed root-cause analysis, with strong technical communication and customer satisfaction during integration.

Key Responsibilities

Validation Planning & Strategy

  • Create comprehensive validation plans for AI fabric switch products covering functionality, performance, reliability, stress, and interoperability.
  • Translate customer and system requirements into measurable test objectives, coverage goals, and product certification criteria.
  • Contribute to PCIe compliance testing strategies and adapt consortium test cases for execution from x86 and ARM platforms.
  • Produce clear, data-driven validation reports, status updates, and specification-compliance assessments for internal stakeholders and customers.

Silicon & System Bring-Up

  • Lead silicon and platform bring-up activities, verifying boot and runtime behavior on x86 and ARM systems.
  • Ensure timely readiness for customer engagements, product demonstrations, and product launches.
  • Debug complex issues across PCIe, NVMe, Ethernet, firmware, hardware, and system layers using protocol analyzers, logic analyzers, in-circuit debuggers, and CPU-based tool suites.
  • Design experiments to isolate unexpected behavior and drive root-cause resolution across silicon, firmware, hardware, software, and platform configuration.

Test Automation & Infrastructure

  • Develop robust, repeatable Python automation for IC and board testing, with emphasis on execution efficiency, test orchestration, data collection, analysis, and automated reporting.
  • Build scalable validation infrastructure that supports repeatable experiments, clear pass/fail criteria, performance characterization, and regression coverage.
  • Improve validation workflows and debug tools to reduce manual effort and accelerate issue resolution.

Customer & Cross-Functional Collaboration

  • Collaborate directly with customers to capture system requirements, reproduce customer scenarios, and demonstrate product capabilities.
  • Drive cross-functional root-cause analysis with silicon, firmware, hardware, software, product, and applications teams; document findings and corrective actions.
  • Communicate risks, results, and recommendations clearly while managing multiple projects in a dynamic, customer-focused environment.

Basic Qualifications 

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
  • 2-12 years of experience supporting or developing complex SoC or silicon products for server, storage, networking, or AI infrastructure applications.
  • Working understanding of x86 and ARM architectures and UEFI/Linux boot sequences.
  • Solid understanding of high-speed signaling principles and hands-on experience with high-speed protocols such as PCIe, NVMe, or Ethernet.
  • Proven experience with silicon and system bring-up, validation, and debug in laboratory and customer system environments.
  • Strong Python automation skills for bench control, test orchestration, data analysis, and reporting.
  • Experience with laboratory equipment including protocol analyzers, logic analyzers, in-circuit debuggers, and CPU-based tool suites.
  • Strong prioritization, planning, communication, and independent execution skills, with a customer-focused mindset.

Preferred Qualifications 

  • Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
  • Working knowledge of C or C++ for embedded firmware, device drivers, or low-level system software.
  • Familiarity with PCIe/ CXL compliance standards and experience adapting consortium tests for platform execution. 
  • Advanced understanding of memory architectures, high-speed signaling, system boot flows, and AI server or accelerator platforms.
  • Familiarity with schematic capture and PCB layout tools such as Cadence Allegro or Altium.
  • Track record of influencing cross-functional teams and navigating complex matrixed organizations.
  • Entrepreneurial, open-minded, and action-oriented approach, with the ability to think and act with the customer in mind.

Salary range is $148,500 to $255,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentivesand benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

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