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Location
In office (Hyderabad)
Seniority
Staff · 2+ years exp
Visa
Sponsors visas in United States, Ireland, Canada; no register of this country names it
Employment
Full-Time

Confirmed on the employer's own hiring board on Nov 12, 2026. First seen by Alion on Nov 10, 2026. Cadence Design Systems scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Cadence Design Systems is an American software company founded in 1988 that supplies the electronic design automation tools engineers use to design and verify integrated circuits. Its products cover digital synthesis and place-and-route, custom and analogue design, circuit simulation with the Spectre and Virtuoso families, functional verification, and increasingly system-level analysis for packaging, thermal behaviour and computational fluid dynamics. Headquartered in San Jose and listed on Nasdaq, it also licenses design intellectual property such as processor and interface blocks, and competes primarily with Synopsys and Siemens EDA.
Backed by Sequoia Capital

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Circuit Pathfinding Engineer

The Technology Pathfinding team within the Silicon Solutions Group ensures that our analog mixed-signal (AMS) IP products take maximum advantage of process technology offerings and roadmap from foundries. To do this, we have expertise in technology analysis, design technology co-optimization (DTCO), circuit design and optimization. AI and HPC products demand increasing compute power, higher memory bandwidth and faster chip to chip communication. We work with foundries and our IP design teams to chart the path that gets us there. Join us if you enjoy working with cutting-edge technology nodes (2nm and lower), designing high-speed analog circuits, and hunting down optimizations that improve performance, power and area (PPA).

Role:

  • Circuit design of key AMS circuits to benchmark and optimize PPA in an early stage/experimental technology setting
  • Analyze complex PPA trade-offs related to timing, power, area and reliability
  • Evaluate advanced process development kits (PDKs) from a design and competitiveness viewpoint
  • Conduct DTCO on technology features and foundation IP to maximize PPA

Requirements:

  • Bachelors degree in Science/Engineering with 2-5 years of industry experience OR Masters degree in Science/Engineering with 1-4 years of industry experience
  • Industry experience in analog circuit design and layout, preferably on advanced technology nodes
  • Academic coursework on analog design from a reputed university covering CMOS/GAA fundamentals, device-technology interaction such as layout dependent effects and factors affecting circuit PPA
  • Familiarity with industry tools for analog and custom design such as simulation tools (Spectre, Hspice), custom design (Virtuoso, Custom Compiler), and reliability (Voltus, Redhawk)
  • Programming skills in a scripting language like Python, TCL, Perl, etc. Experience in using and building AI agentic flows is a plus.

We’re doing work that matters. Help us solve what others can’t.

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