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Salary
≈ $39k – $93k per year (Estimated)
Location
In office (Bengaluru)
Seniority
Staff · 10+ years exp

Confirmed on the employer's own hiring board on Sep 26, 2026. First seen by Alion on Jun 9, 2026.

Overview
Company
Impact
Profile match
Google is an American technology company founded in 1998 by Larry Page and Sergey Brin and now the principal subsidiary of Alphabet, headquartered in Mountain View, California. It operates the world's dominant search engine and the advertising system built around it, along with YouTube, Android, Chrome, Gmail, Maps, Workspace and Google Cloud, reaching billions of users across nearly every internet-connected market. The company designs its own silicon in the Tensor Processing Unit line, develops the Gemini foundation models through Google DeepMind, and derives most of its revenue from advertising while cloud has become its fastest growing segment.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will own the full verification life-cycle from verification planning and test execution to coverage closure, with an emphasis on meeting stringent AI/ML performance and accuracy goals, build constrained-random verification environments capable of exposing corner-case bugs and ensuring the reliability of Artificial Intelligence/Machine Learning (AI/ML) workloads on Tensor Processing Unit (TPU) hardware. You will collaborate closely with design and verification engineers in active projects and perform verification

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

  • Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
  • Lead a team of chip engineers, plan tasks, allocate people, and hold verification design/code reviews.
  • Perform code development for critical verification features and capabilities.
  • Work closely with system, software, design, and physical implementation stakeholders to make technical decisions and represent project status throughout the development process.
  • Lead design verification efforts and work with external and internal partners.

Qualifications

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 10 years of experience with hardware verification languages (System Verilog/Specman), design verification methodologies, and chip design flow.
  • Experience creating detailed chip or subsystem design verification strategies and plans.
  • Experience leading design verification teams through the full cycle, from concept to delivery.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
  • Experience with verification techniques and the full verification life cycle.
  • Experience with performance verification of ASICs and ASIC components.
  • Experience with ASIC standard interfaces and memory system architecture.
  • Experience with multiple SOC projects/cycles in three or more products.
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