Engineer/Staff Engineer – Chip Physical Verification Engineer
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Salary
≈ $108k – $218k per year (Estimated)
Location
In office (Singapore)
Seniority
Staff
Confirmed on the employer's own hiring board on Sep 24, 2026. First seen by Alion on Feb 26, 2026.
Overview
Company
Impact
Profile match
MediaTek Inc. is a global fabless semiconductor company specializing in system-on-chip (SoC) architectures and digital multimedia processing technologies. The enterprise designs and markets integrated circuits for smartphones, smart home devices, IoT hardware, wireless connectivity solutions, automotive electronics, and custom AI chips for edge and cloud applications. Headquartered in Hsinchu, Taiwan, the organization operates an international network of research, development, and sales offices serving original equipment manufacturers (OEMs) and technology brands worldwide.
MediaTek Chip Physical Verification team is looking for qualified candidate to be part of a team that define and enable physical sign-off flow and solutions for SOC design. The candidate will be enabling technology in advanced technology nodes.
- Responsible for Full-chip Physical Verification Sign-off in area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.
- Co-work with Place & Route team to resolve full-chip layout integration issues.
- Coordinates with internal IP owners on IP related issues.
- Coordinates with Manufacturing Team on DRC related issues.
- Provide automation solutions to improve efficiency in tape-out flow.
- Report on tapeout PV issues.
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