Physical Verification Sign-off Engineer
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Salary
≈ $70k – $182k per year (Estimated)
Location
In office (Singapore)
Confirmed on the employer's own hiring board on Sep 24, 2026. First seen by Alion on Sep 3, 2026.
Overview
Company
Impact
Profile match
MediaTek designs system-on-chip processors for smartphones, televisions and connectivity. Its Dimensity and Helio platforms power hundreds of millions of devices annually. The company is one of the largest fabless chip designers in the world.
• Responsible for Full-chip Physical Verification Sign-off in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.
- Co-work with Place & Route team to resolve full-chip layout integration issues.
- Coordinates with internal IP owners on IP related issues.
- Coordinates with Manufacturing Team on DRC related issues.
- Provide automation solutions to improve efficiency in tape-out flow.
- Report on tapeout issues
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