Engineer/Staff Engineer – Multi-Dies Physical Verification Engineer

MediaTek • Processors, MCUs & AI Chips • RF & Wireless Hardware • 6 days ago
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Salary
≈ $66k – $131k per year (Estimated)
Location
In office (Singapore)
Seniority
Staff

First seen by Alion on Feb 26, 2026. MediaTek scores C on the Alion truth index.

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MediaTek

MediaTek Inc. is a global fabless semiconductor company specializing in system-on-chip (SoC) architectures and digital multimedia processing technologies. The enterprise designs and markets integrated circuits for smartphones, smart home devices, IoT hardware, wireless connectivity solutions, automotive electronics, and custom AI chips for edge and cloud applications. Headquartered in Hsinchu, Taiwan, the organization operates an international network of research, development, and sales offices serving original equipment manufacturers (OEMs) and technology brands worldwide.
mediatek.com • HQ: Hsinchu, Taiwan • AI Chips & Accelerators • RF & Wireless Hardware • Processors, MCUs & AI Chips • 1001-5000 employees • Est. 1997
Tech stack of MediaTek
Join the MediaTek Chip Physical Verification team and help create technology for products that will delight and inspire millions of people every day. As a member of our team, you will define and enable physical sign-off flows and solutions for SoC and Multi-Dies (3D IC) design, ensuring first-time success in product tape-out. In this role, you will develop and implement technologies at advanced process nodes, contributing to the success of cutting-edge products.

Job Responsibilities:

  • Responsible for Multi-Dies Physical Verification Sign-off in area of (3D_Stack, 3D_PERC, 3D_ANT) for tape-out.
  • Co-work with Package Design Team to resolve Multi-Dies integration issues.
  • Co-work with ESD Team to run 3D_PERC flow.
  • Coordinates with Chip PV Team on active dies related issues (DRC, LVS, ANT, ERC, ESD)
  • Provide automation solutions to improve efficiency in tape-out flow.
  • Report on Tapeout PV issues.

#LI-WC1

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