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Salary
≈ $97k – $225k per year (Estimated)
Location
In office (San Jose)
Seniority
Staff

Confirmed on the employer's own hiring board on Sep 25, 2026. First seen by Alion on May 12, 2026.

Overview
Company
Impact
Profile match
MediaTek Inc. is a global fabless semiconductor company specializing in system-on-chip (SoC) architectures and digital multimedia processing technologies. The enterprise designs and markets integrated circuits for smartphones, smart home devices, IoT hardware, wireless connectivity solutions, automotive electronics, and custom AI chips for edge and cloud applications. Headquartered in Hsinchu, Taiwan, the organization operates an international network of research, development, and sales offices serving original equipment manufacturers (OEMs) and technology brands worldwide.
MediaTek’s Data Center team is at the forefront of innovation, driving the development of cutting-edge technologies that power the world's most advanced data centers. We are a dynamic group of system architects, packaging technology developers, and SoC design experts dedicated to creating high-performance, efficient, and reliable solutions. Our team collaborates closely to push the boundaries of technology, ensuring optimal performance, power efficiency, and scalability for data center applications. Join our Data Center team and be a part of the technological revolution that is shaping the future of data centers. If you are passionate about innovation and have the expertise to drive strategic technology development, we would love to hear from you.

Responsibilities

  • Lead and mentor a team of analog, mixed-signal, and power delivery engineers, providing technical direction and fostering a culture of innovation, execution excellence, and continuous learning.
  • Define and drive the architecture, modeling, design, and validation of integrated voltage regulator (IVR) solutions for next-generation CPU, GPU, AI, and accelerator products.
  • Oversee the development of high-performance IVR architectures, ensuring best-in-class efficiency, power density, transient response, voltage accuracy, power integrity, reliability, and thermal performance.
  • Drive requirements definition, feasibility analysis, architecture tradeoffs, and design reviews while collaborating closely with silicon, package, platform, thermal, product, and manufacturing teams.
  • Develop innovative on-die and on-package power delivery solutions leveraging advanced CMOS technologies, integrated passive devices, digital control techniques, and co-optimization across silicon, package, and system power delivery networks.
  • Lead power delivery roadmap planning, technology assessments, and vendor engagements to accelerate adoption of next-generation IVR technologies.
  • Collaborate with system architects to optimize power management strategies, dynamic voltage scaling, telemetry, and workload-aware power delivery solutions.
  • Communicate complex technical concepts clearly to executive leadership, customers, and cross-functional stakeholders while representing the team in technical reviews and strategic planning discussions.

#LI-WC2

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