Display Engineering Intern
Confirmed on the employer's own hiring board on Oct 16, 2026. First seen by Alion on Oct 14, 2026. Meta scores B on the Alion truth index.
This is a 12 week internship.
Responsibilities
Design semiconductor circuits using Cadence Virtuoso Schematic Editor and simulate them using Cadence simulation tools (Spectre/SPICE) Build and validate large-array simulation models using combined distributed and lumped loads, incorporating peripheral circuit blocks and improved test bench setups Analyze circuit layouts and incorporate parasitic extraction results into array-level models to predict coupling to sensitive nodes (e.g., anode, drive transistor gate) Correlate simulated predictions (crosstalk, mura, settling behavior, power/load effects) against measured display data to improve model accuracy Operate optical lab instruments (e.g., microscope, spectrometer, imaging colorimeter, probe station) to measure display KPIs such as crosstalk and mura Develop quantifiable, measurable metrics for display artifacts and automate measurement and data analysis using Python/MATLAB
Qualifications
Currently has, or is in the process of obtaining, an MS in Electrical Engineering, Microelectronics, VLSI, or a related field Experience in mixed-signal circuit design, including analog/digital fundamentals, signals and systems, and semiconductor device behavior Hands-on experience with Cadence Virtuoso tools (Schematic Editor) and Cadence circuit simulation (Spectre/SPICE) Understanding of circuit layouts, parasitic effects, and large-array modeling concepts Experience with programming in Python and/or MATLAB for data collection and analysis Must obtain work authorization in the country of employment at the time of hire, and maintain ongoing work authorization during employment Intent to return to full-time degree program after completion of the internship Currently has, or is in the process of obtaining, a PhD in Electrical Engineering, Microelectronics, VLSI, or a related field Strong preference for background in memory design and characterization, or related array structures (e.g., SRAM, image sensors, solar cell arrays) Familiarity with display technologies (LCD, OLED, uOLED) and display pixel circuits (e.g., multi-transistor pixel architectures) Experience with optical lab instruments such as microscopes, spectrometers, imaging colorimeters, and probe stations Experience developing quantitative optical/visual performance metrics (e.g., crosstalk, mura) for displays