428,639open jobs
14,645companies
62,546added this week
Browse all
Salary
$25k – $57k per year (Estimated)
Location
Remote/Hybrid (Pune, India)
Seniority
Senior
Employment
Full-Time
Overview
Company
Impact
Profile match
NXP Semiconductors is a Dutch chipmaker established in 2006 when Philips spun out its semiconductor division, and it concentrates on embedded processing rather than general purpose computing. Its largest market is automotive, where it supplies radar sensors, vehicle networking, battery management and the secure processors behind keyless entry and digital car keys, alongside industrial and internet of things microcontrollers, mobile secure elements and communications infrastructure silicon. Headquartered in Eindhoven and listed on Nasdaq, it is one of the leading suppliers of near field communication and automotive processing chips in the world.

Job Title: Senior Physical Design Engineer

Location

Pune / Bangalore / Hyderabad (Hybrid)

Experience

8-10 Years

Job Summary

We are seeking a highly motivated and experienced Senior Physical Design Engineer to join our VLSI Physical Design team. The candidate will be responsible for delivering high-quality physical implementation of complex SoC/IP blocks from netlist to GDSII, ensuring timing, power, area, and reliability targets are met. The ideal candidate should have hands-on expertise in advanced node design implementation and signoff methodologies.

Key Responsibilities

  • Own end-to-end physical design implementation of complex digital blocks/subsystems.
  • Drive floorplanning, power planning, placement, CTS, routing, timing closure, and physical verification.
  • Perform design optimization for PPA (Power, Performance, Area) targets.
  • Execute timing closure across multiple operating modes and process corners.
  • Analyze and resolve setup, hold, SI, IR-drop, EM, and congestion issues.
  • Collaborate with RTL, Synthesis, DFT, STA, Package, and Signoff teams to achieve project milestones.
  • Support ECO implementation and tapeout activities.
  • Develop and enhance PD methodologies, automation flows, and scripts to improve productivity.
  • Review design quality and mentor junior engineers.
  • Work closely with global cross-functional teams.

Required Technical Skills

  • Strong expertise in:
    • Floorplanning
    • Power Planning
    • Placement Optimization
    • Clock Tree Synthesis (CTS)
    • Routing
    • Timing Closure
    • Physical Verification

STA & Signoff

  • In-depth knowledge of:
    • Static Timing Analysis (STA)
    • Multi-Mode Multi-Corner (MMMC) methodologies
    • Crosstalk/SI Analysis
    • ECO Flows
    • Timing Signoff

Physical Signoff

  • Experience with:
    • IR Drop Analysis
    • Electromigration (EM) Analysis
    • DRC/LVS Closure
    • Reliability Checks

Tools

Hands-on experience with industry-standard EDA tools:

  • Cadence Innovus
  • Synopsys ICC2
  • PrimeTime
  • Tempus
  • RedHawk / Voltus
  • StarRC / Quantus
  • Calibre

Educational Qualification

  • Bachelor's or Master's Degree in Electronics, VLSI, Electrical Engineering, or related field.

More information about NXP in India...

#LI-9415
Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
428,639 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Similar stack
Same company
Pune
In office • 15+ years exp • Bachelor's Degree
AI/ML
AI Agents
Chips/EDA
Synopsys PrimeTime
Synopsys Fusion Compiler
Formal Verification
Synopsys StarRC
Cadence Quantus
Apply
$71k – $98k per year • In office • Full-Time • 12+ years exp • Bachelor's Degree • Catania
Python
Perl
Chips/EDA
Cadence Innovus
Synopsys PrimeTime
Synopsys Fusion Compiler
Siemens Calibre
Synopsys IC Validator
Cadence Pegasus
Ansys RedHawk
Apply
$113k – $236k per year (Estimated) • In office • Full-Time • 3+ years exp • Bachelor's Degree • Singapore
Python
Verilog
SystemVerilog
Perl
DevOps
HPC
Web3
Bitcoin
Chips/EDA
Synopsys Design Compiler
Synopsys PrimeTime
Cadence JasperGold
Formal Verification
Cadence Genus
Cadence Conformal
Apply
STA Engineer 2 days ago
In office • Full-Time • Bengaluru
Python
Chips/EDA
Synopsys PrimeTime
Cadence Tempus
Apply
$21k – $55k per year (Estimated) • In office • Full-Time • Hyderabad
Python
Perl
Chips/EDA
Synopsys PrimeTime
Apply
$25k – $73k per year (Estimated) • In office • Full-Time • 10+ years exp • Bachelor's Degree • Kaohsiung
Apply
$27k – $71k per year (Estimated) • In office • Internship • Bachelor's Degree • Shanghai
Python
C++
AI/ML
AI Agents
Edge AI
Apply
$26k – $68k per year (Estimated) • In office • Internship • Beijing • Tianjin
Python
AI/ML
Copilot
LangChain
Prompt Engineering
AI Agents
Semantic Kernel
LLM
RAG
OpenAI
Copilot Studio
DevOps
Azure
Analytics
Power BI
Management
Power Automate
Power Apps
SharePoint
Apply
$33k – $72k per year (Estimated) • In office • Full-Time • Brno
Python
Apply
$35k – $58k per year (Estimated) • In office • Full-Time • Dresden
C++
C++
TensorFlow C++
PyTorch C++
AI/ML
TensorFlow
PyTorch
Apply
$18k – $41k per year (Estimated) • Remote/Hybrid • Full-Time • Pune
AI/ML
AI Agents
Apply
Remote/Hybrid • Full-Time • Pune
AI/ML
AI Agents
Apply
$15k – $37k per year (Estimated) • In office • Full-Time • 5+ years exp • Bachelor's Degree • Pune
SQL
Apex
Apex
MuleSoft
Visualforce
Databases
Oracle
Apply
See all jobs
This is one of many
428,639 more open roles from verified company boards, updated every day.