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Analog Layout Engineer

onsemi • Analog & Power Semiconductors • Machine Vision & 3D Cameras • 1 day ago
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Salary
≈ $20k – $52k per year (Estimated)
Location
In office (Bengaluru)
Seniority
Senior · 5+ years exp

Confirmed on the employer's own hiring board on Oct 5, 2026. First seen by Alion on Oct 5, 2026. onsemi scores B on the Alion truth index.

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onsemi

Onsemi is an American semiconductor company that was spun out of Motorola in 1999 and has since narrowed itself from a broad commodity chip supplier into a focused power and sensing business. Its silicon carbide and silicon power devices go into electric vehicle traction inverters, chargers and industrial drives, while its image sensors are used in automotive cameras and industrial vision, and it has deliberately exited lower-margin product lines to concentrate on these markets. Headquartered in Scottsdale, Arizona and listed on Nasdaq, it owns its own silicon carbide substrate manufacturing to secure supply.
onsemi.com • HQ: Scottsdale, United States • Machine Vision & 3D Cameras • Analog & Power Semiconductors • 1001-5000 employees • Est. 1999
Tech stack of onsemi

We are seeking a Analog Layout Engineer to join our Image Sensor team. The ideal candidate will have strong expertise in analog and mixed-signal layout design, with the ability to independently own layout blocks and work closely with circuit designers to deliver layouts with quality.

  • Implement layout of analog and mixed-signal blocks including ADCs, PLLs, Bandgaps, References, LDOs, Bias circuits, and image sensor IPs.
  • Perform and resolve DRC, LVS, ERC, EM/IR, density, and reliability checks using EDA tools like Calibre
  • Closely work with circuit designers to ensure design goals and schedules are met.
  • Support layout reviews and contribute to methodology and automation.
  • #LI-RT1
  • 5-8 years of experience in analog and mixed-signal layout design.
  • Strong hands-on experience with Cadence Virtuoso Layout Suite.
  • Good understanding of analog layout verification and signoff flows.
  • Strong knowledge of:
    • Device matching and common-centroid layout techniques
    • Symmetry and critical analog routing
    • Shielding and noise isolation methodologies
    • Parasitic-aware layout practices
  • Effective communication skills.
  • Exposure to layout automation, scripting, or productivity enhancement initiatives is desirable.
  • #LI-RT1
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