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Design Verification Engineer
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Salary
$150k – $250k per year
Location
In office (Santa Clara, Boston, Austin)
Visa
H-1B filings in 12 months: 5 · for this role: 4
Employment
Full-Time
Confirmed on the employer's own hiring board on Oct 28, 2026. First seen by Alion on Jul 16, 2026. Velaura scores B on the Alion truth index.
Overview
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Velaura AI, Inc., formerly Auradine, builds ultra-low-power compute solutions for data center, edge, and physical AI applications.
Backed by Premji Invest, Mayfield, Celesta
Role Overview
We are looking for talented Design Verification Engineers to help verify and deliver Velaura’s next-generation Physical AI SoC. In this role, you will work closely with architects, RTL engineers, software engineers, and system teams to verify complex hardware blocks and system-level behavior across the entire platform.You will help establish confidence in the correctness, performance, reliability, and safety of the architecture-from individual RTL blocks to complete HW/SW systems running real-world workloads. We welcome engineers at all experience levels who enjoy understanding systems, finding corner cases, and solving challenging technical problems.
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