DPU IP System Engineer – DPU(J10279)

Cix Technology · Python · C++ · 13 days ago

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Location

In office (Shanghai)

Confirmed on the employer's own hiring board on Oct 29, 2026. First seen by Alion on Sep 10, 2026. Cix Technology scores B on the Alion truth index.

Overview

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Cix Technology

Cix Technology is a Shanghai-based fabless chip company that designs high-performance, low-power Arm-based CPUs and heterogeneous SoCs for personal computers, smart car cockpits, edge computing and embodied AI devices. Founded in 2021, it has raised several funding rounds from investors including Lenovo Capital, Qiming Venture Partners, Shunwei Capital and NIO Capital, and runs offices in Beijing, Wuhan, Suzhou, Wuxi and Kunshan alongside its Shanghai sites. It hires CPU microarchitecture, SoC design, back-end and NoC validation engineers, power, thermal and high-speed signal engineers, HarmonyOS developers and customer solution engineers.

cixtech.com · HQ: Shanghai, China · AI Chips & Accelerators · Processors, MCUs & AI Chips · 201-500 employees · Est. 2021

Tech stack of Cix Technology

Backed by Qiming Venture Partners

岗位职责 / Responsibilities

岗位概述

负责 DPU（数据处理单元 / 数据通路加速）相关 IP 的硅后功能验证、bring-up 与 debug，覆盖数据面、控制面与主机交互路径，并具备 ATE/SLT pattern 开发交付能力。

工作职责

主导 DPU 子系统 post-silicon 功能验证：数据通路、包处理/卸载、DMA、队列调度、中断开销、复位与错误处理等

负责 DPU bring-up 与硅后功能/性能相关问题定位，协同网络、存储、主机接口与软件栈团队闭环

使用 FPGA / Emulator 构建 DPU 场景级验证，支持预硅验证、硅后复现与回归

开发并交付面向 ATE / SLT 的 DPU 功能 pattern，覆盖关键数据通路与控制通路

制定 DPU 验证覆盖策略与签发标准，沉淀可复用验证框架与自动化能力

参与架构/规格评审，对硅后风险、可测性与量产测试方案给出技术建议

任职要求 / Requirements

任职要求

DPU / SmartNIC / 网络加速 / 数据通路 IP 验证或硅后经验

熟悉 DMA、队列、descriptor、包处理流水线、PCIe/主机接口中至少一类核心技术

具备复杂 SoC 子系统 post-silicon bring-up / debug 经验

有 FPGA / Emulator 验证经验

能独立完成 ATE / SLT pattern 开发、调试与交付

熟悉 SV/UVM、C/C++、Python; 具备系统级问题拆解能力

加分项

RDMA、加密卸载、虚拟化（SR-IOV/virtio）、高性能包处理、Linux 驱动协同调试经验

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