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Salary
≈ $33k – $79k per year (Estimated)
Location
In office (Shanghai)
Seniority
Architect · 8+ years exp

Confirmed on the employer's own hiring board on Oct 26, 2026. First seen by Alion on Apr 28, 2026. Cix Technology scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Cix Technology is a Shanghai-based fabless chip company that designs high-performance, low-power Arm-based CPUs and heterogeneous SoCs for personal computers, smart car cockpits, edge computing and embodied AI devices. Founded in 2021, it has raised several funding rounds from investors including Lenovo Capital, Qiming Venture Partners, Shunwei Capital and NIO Capital, and runs offices in Beijing, Wuhan, Suzhou, Wuxi and Kunshan alongside its Shanghai sites. It hires CPU microarchitecture, SoC design, back-end and NoC validation engineers, power, thermal and high-speed signal engineers, HarmonyOS developers and customer solution engineers.

岗位职责 / Responsibilities

职位描述

定义芯片的顶层架构、技术规格和系统级方案,主导从应用场景到微架构实现的全过程,确保芯片在性能、功耗、面积和成本上达到最佳平衡,并满足最终产品的核心竞争力需求。

________________________________________

主要职责

1. 系统定义与架构设计

o 深入理解产品需求(如AI计算、移动通信、自动驾驶等),将复杂的应用场景和算法转化为清晰的芯片架构定义和系统级指标。

o 主导制定芯片的顶层架构规格,包括计算单元、存储子系统、片上互连、外设接口、电源与时钟域规划等。

o 进行关键架构决策,如CPU/GPU/NPU等核心IP的选型与配置、总线结构、芯片分层与模块划分。

2. 性能、功耗与面积分析

o 建立系统级性能模型,进行性能仿真与瓶颈分析,指导微架构优化。

o 主导芯片级功耗预估与电源管理架构设计,定义电源状态、DVFS策略等。

o 进行芯片面积预估,在PPA(性能、功耗、面积)之间进行权衡与优化。

3. 技术选型与集成规划

o 评估和选择第三方IP(如ARM核心、高速接口IP),并定义自研IP的规格。

o 设计芯片的Die-to-Die接口、先进封装(如Chiplet)方案,以及芯片与板级的协同设计考量。

o 与软件、系统团队协同,定义芯片启动流程、低层驱动框架、安全启动与可信执行环境方案。

4. 全流程技术指导与协同

o 主导架构设计文档的编写与评审,为前端设计、验证、后端实现、软件和系统团队提供权威的技术指导。

o 参与关键设计/验证节点的评审,确保最终实现符合架构定义。

o 支持芯片测试、调试和性能调优,分析并解决系统级问题。

任职要求 / Requirements

必备条件

1. 教育背景:微电子、电子工程、计算机体系结构等相关专业硕士及以上学历。

2. 工作经验:

o 8年以上数字芯片设计经验,其中至少5年专注于复杂SoC的架构定义或系统设计。

o 有从规格定义到量产的全流程参与经验,至少成功流片并量产过一款中大型SoC芯片。

3. 技术能力:

o 精通计算机体系结构,深入理解CPU、缓存一致性、片上网络、存储器系统。

o 精通一种或多种主流总线协议(如AMBA AXI/CHI, TileLink)。

o 具备扎实的PPA分析能力,熟练使用性能建模、仿真和分析工具。

o 熟悉芯片设计前端流程,包括RTL设计、验证、逻辑综合等。

o 出色的文档撰写与沟通能力,能清晰阐述复杂技术问题。

优先条件

  • 在特定领域有深厚积累,如:高性能计算(HPC)、人工智能(AI/ML)、移动AP、自动驾驶、高速网络等。
  • 具备基于RISC-V的处理器或SoC架构设计经验。
  • 拥有先进工艺节点(如7nm及以下)和Chiplet设计经验。
  • 有丰富的软件协同设计经验,理解软硬件协同优化。
  • 对芯片安全架构(如TrustZone, TPM)有深入理解。
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