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Salary
≈ $25k – $57k per year (Estimated)
Location
In office (India)
Seniority
Staff · 7+ years exp

Confirmed on the employer's own hiring board on Oct 28, 2026. First seen by Alion on Oct 23, 2026.

Overview
Company
Impact
Profile match
HCLTech is a major Indian multinational information technology (IT) services and consulting company headquartered in Noida, Uttar Pradesh. Spun off from the original HCL Group in 1991, it ranks as one of India's largest technology companies alongside firms like TCS, Infosys, and Wipro.

Job Summary

We are looking for a Senior Emulation Engineer with 7-10 years of experience in ASIC/SoC verification and emulation. The ideal candidate will have strong hands-on expertise in building, deploying, and debugging complex designs on hardware emulation platforms and accelerating pre-silicon verification for large-scale SoCs. Experience with advanced AI, Datacenter, Networking, Automotive, or HPC SoCs is highly desirable.

Key Responsibilities

Key Responsibilities

  • Develop, maintain, and optimize emulation environments for complex ASIC/SoC programs.
  • Perform design bring-up, partitioning, compilation, and debug on emulation platforms.
  • Collaborate with Design, Verification, Firmware, and Validation teams for pre-silicon verification activities.
  • Debug emulation failures and analyze issues across RTL, testbench, and software stacks.
  • Enable and execute SoC-level use cases, firmware boot, software regression, and system validation in emulation.
  • Drive performance optimization of emulation runs, regression infrastructure, and debug workflows.
  • Support verification acceleration, HW/SW co-verification, and early software development.
  • Develop automation scripts and flows to improve emulation productivity and scalability.

Skill Requirements

Required Skills

  • Strong understanding of ASIC/SoC architecture and verification lifecycle.
  • Hands-on experience with industry-standard emulation platforms such as:
    • Cadence Palladium
    • Synopsys ZeBu
    • Siemens Veloce
  • Good knowledge of Verilog/SystemVerilog and simulation-based verification methodologies.
  • Experience with design partitioning, clocking strategies, probes, triggers, and emulation debug.
  • Strong debugging skills across RTL, software, and system-level environments.
  • Experience with Linux environments, scripting, and automation using Python, Perl, TCL, or Shell.
  • Familiarity with HW/SW co-verification and firmware-driven validation.

Other Requirements

Hands-on emulation engineer with proven experience on Palladium, ZeBu, or Veloce, capable of handling large-scale SoCs and enabling early software execution, system validation, and verification acceleration for next-generation AI, Datacenter, Networking, Automotive, or HPC products.

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