Senior Engineer-Analog Layout
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Location
In office (Hyderabad)
Seniority
Senior
Visa
Sponsors visas in United States; no register of this country names it
Employment
Full-Time
Confirmed on the employer's own hiring board on Nov 13, 2026. First seen by Alion on Jun 24, 2026. MosChip scores B on the Alion truth index.
Overview
Company
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Profile match
MosChip provides turnkey ASIC design services, product engineering services that includes IoT, AI/ML, Data services, Cloud with design centers across US & India.
- He/She should be able to act as focal point with customers, work and lead a team of 3-4 custom layout engineers on analog layout, physical verification, maintaining PDKs, ealuating them. The candidates should have a strong expertise in some critical layouts such as PLL, DLL, LNA, VGA, ADC, LDO. He/She should be able to adapt to new technologies/tools/flows pretty quickly.
- Expertise in Custom Layout Standard Cells, I/O or special analog designs such as RF transceivers, LNA, VGA, PLL, DLL, LDO, Bandgap, VCO, ADC,DAC.
- Strong Layout Design Concepts.
- Experience in Pcell development, maintaining and modifying PDKs.
- Experience in Layout Design tools such as Virtuoso, Virtuoso-XL.
- Expertise in SKILL Programming Language.
- Experience in Physical verification.
- Exposure to Calibre, Hercules and Assura.
- Exposure to digital place & route.
- Should be able to mentor layout engineers and act as focal point with customers.
- Good understanding of Analog Design.
- Strong basics in process technology, fabrication techniques.
- Good written and oral communication skills. Ability to clearly document plans.
- Ability to interface with different teams and prioritize work based on project needs.
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