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Salary
≈ $83k – $191k per year (Estimated)
Location
In office (Seongnam)
Seniority
Senior · 5+ years exp

Confirmed on the employer's own hiring board on Oct 17, 2026. First seen by Alion on Jan 28, 2026. Rebellions scores C on the Alion truth index.

Overview
Company
Impact
Profile match
Rebellions is a South Korean semiconductor company founded in 2020 by former Wall Street quantitative engineers and IBM chip designers to build accelerators specialised for AI inference rather than training. Its ATOM processor targets efficiency per watt in data centre inference, and the follow-on REBEL design uses chiplet packaging to scale to large language model workloads. The company merged with Sapeon Korea, the AI chip unit of the SK group, to consolidate the domestic effort against foreign GPUs, becoming South Korea's first AI semiconductor unicorn and working closely with SK Telecom, KT and Samsung Foundry.

About the Job

As a Principal SI/PI Engineer, you will lead the electrical integrity strategy for next-generation AI and high-performance computing systems. With over 10 years of expertise, you will ensure robust power delivery and signal fidelity across cutting-edge interfaces like HBM3E and PCIe Gen6. This role drives innovation in 2.5D/3D packaging and automated design flows to maintain leadership in silicon-to-system performance.

Responsibilities and Opportunities

  • Power Integrity (PI) Optimization: Perform DC/AC analysis, including IR Drop and PDN impedance profiling, to ensure stable power delivery under high-frequency dynamic loads.
  • Signal Integrity (SI) Analysis: Conduct electromagnetic (EM) simulations to mitigate Crosstalk, Reflection, and Insertion Loss for high-speed interfaces (PCIe Gen6, HBM3E, Ethernet, D2D).
  • Innovation Opportunity: Lead the implementation of next-generation packaging solutions (2.5D/3D, Chiplets) and develop automated design flows using advanced optimization techniques.
  • Co-work and communicate with DSP for implementation

Key Qualifications

  • 5+ years of experience
  • Simulation Mastery: Expert-level use of SI/PI simulation tools (e.g., ANSYS HFSS, SIwave, Cadence Sigrity, or Keysight ADS)
  • Validation Skills: Proven ability to perform "Simulation vs. Measurement" correlation using high-end lab equipment (VNA, TDR, and 10GHz+ Oscilloscopes)

Ideal Qualifications

  • Deep understanding HBM3E PHY, D2D PHY and Ethernet PHY
  • Experience to design High-Speed Package Architecture: Design and optimize multi-layer semiconductor substrates

전형절차

  • 서류전형 > On-line 인터뷰 > On-site 인터뷰 > Culture-fit 인터뷰 > 처우 협의 > 최종 합격
  • 전형절차는 직무별로 다르게 운영될 수 있으며, 일정 및 상황에 따라 변동될 수 있습니다.
  • 전형 일정 및 결과는 지원 시 작성하신 이메일로 개별 안내드립니다.

참고사항

  • 본 공고는 모집 완료 시 조기 마감될 수 있습니다.
  • 지원서 내용 중 허위사실이 있는 경우에는 합격이 취소될 수 있습니다.
  • 채용 및 업무 수행과 관련하여 요구되는 법령 상 자격이 갖추어지지 않은 경우 채용이 제한될 수 있습니다.
  • 보훈 대상자 및 장애인 여부는 채용 과정에서 어떠한 불이익도 미치지 않습니다.
  • 담당 업무 범위는 후보자의 전반적인 경력과 경험 등 제반사정을 고려하여 변경될 수 있습니다. 이러한 변경이 필요할 경우, 최종 합격 통지 전 적절한 시기에 후보자와 커뮤니케이션 될 예정입니다.
  • 채용 관련 문의사항은 아래 메일 주소로 문의바랍니다.
  • [email protected]
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