Sr Manager or Principal Engineer for Firmware Development - 19315

Job Description and Requirements

You Are:

You have built a career in firmware at the boundary between hardware, software, and analog. You bring deep expertisein developing product features and customer-specific enhancements,also working with post-silicon bring-upto optimize the hardware and algorithm.

Analyzing RTL waveform to debug firmware and discussing algorithm performance with system designers is central to your technical approach.

The role sits at the intersection of deep technical work and team leadership. You are comfortable bringing engineers together to identify and solve technical issues.

At Synopsys, the Serdes PHY firmware you work on will power the next generation of PAM4 PCIe and Ethernet

What You’ll Be Doing

• Joining Serdes IP team for Application Optimized Intellectual Property (AOIP), the ‘Factory Two’ model that helps customers to develop differentiated silicon tailored to specific workloads and system architecture
• Joining a team working on PCIe7 and PCIe8 PHY which recently won CEO innovation award
• Developing firmware for next-generation PAM4 Serdes spanning multiple protocols like PCIe and Ethernet.
• Collaborating closely with systems, analog design, digital design, verification, and lab teams during firmware development and debugging.
• Supporting and enhancing existing firmware applications and features.
• Developing and maintaining infrastructure for firmware application development.
• Diagnosing customer firmware-related failures.
• Participating in firmware integration, debugging, and silicon hardware bring-up.
• Driving improvements in firmware design methodologies across the organization.
• Contributing to improvements in system-level architecture while working with cross-functional team members.
• Define verification plans and build verification environments for chip/module level designs with DV engineers using System Verilog with UVM

The Impact You Will Have

• Advancing the development of high-performance firmware for cutting-edge technologies.
• Enhancing the functionality and reliability of Synopsys' Serdes PHY IP products.
• Optimizing hardware and algorithms through post-silicon bring-up and debugging activities.
• Improving customer satisfaction through robust firmware solutions and comprehensive documentation.
• Driving innovation in firmware design methodologies and system-level architecture.
• Collaborating with diverse teams to deliver integrated solutions that push the boundaries of technology.

What You’ll Need

• Bachelors/Masters/PhD in Computer Engineering, or Electrical Engineering, or equivalent with relevant industry experience
• 10+ years working experience in a related field
• Understanding of both digital logic and firmware/software development plusprevious in-depth specialization in either.
• Proficient in C
• Advocate for structured firmware development, verification and documentation processes
• Working understanding of cross-development tool flows
• Working experience of digital logic design, simulation, and debug using Verilog
• Understanding of Serdes standards such as PCIe, Ethernet is an asset
• Scripting experience with Perl, Python, Bash, or Cshis an asset.

Who You Are

• Ability to resolve issues in creative ways and exercise self-directed judgment in selecting methods and techniques to obtain solutions.
• Experience designing and promoting solutions to complex digital design and software development challenges.
• Demonstrated experience executing projects from start to completion.
• Demonstrated experience contributing complex portions to larger team design/development.
• Experience working with diverse internal team members and customers on complex technical issues.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact [email protected].