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Salary
$174k – $225k per year
Location
In office (Cupertino)
Seniority
Junior · 1+ year exp
Visa
H-1B filings in 12 months: 6,350 · for this role: 1,366 · green card filings: 39

Confirmed on the employer's own hiring board on Nov 7, 2026. First seen by Alion on Nov 5, 2026. Apple scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Apple is an American multinational technology company founded in 1976 by Steve Jobs, Steve Wozniak and Ronald Wayne, and headquartered in Cupertino, California. It designs and sells consumer hardware including the iPhone, Mac, iPad, Apple Watch, AirPods and Vision Pro, together with the operating systems and silicon that run them. A growing services division built around the App Store, iCloud, Apple Music, Apple TV+ and Apple Pay now contributes a large share of profit, making Apple one of the most valuable companies in the world.

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Cupertino , California and various unanticipated locations throughout the USA. Review Architecture and Design Specifications. Extract design features and develop attributes and verification plans. Work with designers to verify DFT implementation and run various checks. Implement test benches, assertions, checkers, generating directed/constrained random tests. Debug failures, run RTL simulations/power aware gate level simulations, supervise bugs, and close coverage. Build custom testbenches with power aware designs. Generate Collaterals and reports for the test. Perform simulations in RTL, Gate Netlist, and with X-propagation and UPF enabled. Generate Pattern files with DV test scripts. Run playback simulations with the generated patterns. Handle schedules and support multi-functional engineering effort. Assist in verification flows, automation scripts and regressions. Work with test engineers to bring up functional and structural patterns for various Analog IPs and DFT features on Silicon and support further characterization and test time optimization. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

Master’s Degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field and 1 year of experience in the job offered or related occupation.

Experience and/or education must include:

Utilizing VLSI Design and VLSI Architecture to understand complex ASIC designs

Using Computer Architecture to aid in understanding of compute

Using Verilog skills to debug and verify designs

Using Perl/Python/Tcl scripting to aid in automating scripts and internal tools

CMOS devices and circuits

Using Digital Logic Gate Analysis and Design

Using Test Automation and Test Methodology

Performing Timing Analysis to debug complex timing bugs

Employing Synthesis and Simulation to debug RTL and netlist issues

Utilizing DFT knowledge for generating ATE patterns and ATE debug

Verifying memory operation behavior using knowledge of Memory Circuits

Preferred Qualifications

N/A

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